From a1ec8a1ed46349b7b98c17f3121a47c7a9a033a4 Mon Sep 17 00:00:00 2001 From: Michael Gielda Date: Thu, 3 Apr 2014 15:11:19 +0200 Subject: Update introduction.rst --- doc/source/introduction.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/source/introduction.rst b/doc/source/introduction.rst index 9f77fa1..741f7de 100644 --- a/doc/source/introduction.rst +++ b/doc/source/introduction.rst @@ -220,7 +220,7 @@ Vybrid has three available memory regions: .. note:: - Out of the 16MB of the DRAM memory in the CPU, 6MB was reserved for enabling the passing of large data blocks between Cortex-A and Cortex-M. This setting can be changed in the ``ecos/packages/hal/ cortexm/vybrid/col_vf61/current/include/pkgconf`` file by modifying the ``DRAM LENGTH`` and ``hal_startup_stack`` values (currently ``0x9FFFF0``). + Out of the 16MB of the DRAM memory in the CPU, 6MB was reserved for enabling the passing of large data blocks between Cortex-A and Cortex-M. This setting can be changed in the ``ecos/packages/hal/cortexm/vybrid/col_vf61/current/include/pkgconf/mlt_vybrid_ext_dram.ldi`` file by modifying the ``DRAM LENGTH`` and ``hal_startup_stack`` values (currently ``0x9FFFF0``). U-Boot over TFTP ---------------- -- cgit v1.2.3