diff options
| author | Etienne Carriere <etienne.carriere@linaro.org> | 2018-02-02 13:16:18 +0100 |
|---|---|---|
| committer | Etienne Carriere <etienne.carriere@linaro.org> | 2018-02-02 13:16:18 +0100 |
| commit | 3fe81dcf5db35bd6afe8dd9f6b9ebdd06e9f1369 (patch) | |
| tree | a8123ac555fb3189c8c7daa8ac87ff914decc1e4 | |
| parent | 956defc7207150ecde2b1ecefffc61ea40a0fef3 (diff) | |
aarch32: use lr as bl32 boot argument on aarch32 only systems
Add 'lr_svc' as a boot parameter in AArch32 bl1. This is used by Optee
and Trusty to get the non-secure entry point on AArch32 platforms.
This change is not ported in AArch64 mode where the BL31, not BL32,
is in charge of booting the non secure image (BL33).
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
| -rw-r--r-- | bl1/aarch32/bl1_exceptions.S | 5 | ||||
| -rw-r--r-- | include/common/ep_info.h | 10 |
2 files changed, 14 insertions, 1 deletions
diff --git a/bl1/aarch32/bl1_exceptions.S b/bl1/aarch32/bl1_exceptions.S index f73db402..a1e32f06 100644 --- a/bl1/aarch32/bl1_exceptions.S +++ b/bl1/aarch32/bl1_exceptions.S @@ -73,6 +73,11 @@ debug_loop: ldr r1, [r8, #(ENTRY_POINT_INFO_PC_OFFSET + 4)] msr spsr, r1 + /* Some BL32 stages expect lr_svc to provide the BL33 entry address */ + cps #MODE32_svc + ldr lr, [r8, #ENTRY_POINT_INFO_LR_SVC_OFFSET] + cps #MODE32_mon + add r8, r8, #ENTRY_POINT_INFO_ARGS_OFFSET ldm r8, {r0, r1, r2, r3} eret diff --git a/include/common/ep_info.h b/include/common/ep_info.h index 3f6213f0..3c2fe444 100644 --- a/include/common/ep_info.h +++ b/include/common/ep_info.h @@ -20,7 +20,8 @@ ******************************************************************************/ #define ENTRY_POINT_INFO_PC_OFFSET U(0x08) #ifdef AARCH32 -#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x10) +#define ENTRY_POINT_INFO_LR_SVC_OFFSET U(0x10) +#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x14) #else #define ENTRY_POINT_INFO_ARGS_OFFSET U(0x18) #endif @@ -93,6 +94,7 @@ typedef struct entry_point_info { uintptr_t pc; uint32_t spsr; #ifdef AARCH32 + uintptr_t lr_svc; aapcs32_params_t args; #else aapcs64_params_t args; @@ -108,6 +110,12 @@ CASSERT(ENTRY_POINT_INFO_PC_OFFSET == __builtin_offsetof(entry_point_info_t, pc), \ assert_BL31_pc_offset_mismatch); +#ifdef AARCH32 +CASSERT(ENTRY_POINT_INFO_LR_SVC_OFFSET == + __builtin_offsetof(entry_point_info_t, lr_svc), + assert_entrypoint_lr_offset_error); +#endif + CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \ __builtin_offsetof(entry_point_info_t, args), \ assert_BL31_args_offset_mismatch); |