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| author | Etienne Carriere <etienne.carriere@linaro.org> | 2017-11-08 14:38:33 +0100 |
|---|---|---|
| committer | Etienne Carriere <etienne.carriere@linaro.org> | 2017-11-08 14:38:33 +0100 |
| commit | 64cc6e91e819ccbf5fe3bf8a5c177b8fa8012d8c (patch) | |
| tree | 6cc714edf449c3e44fde7840598d30089edd9f57 /common | |
| parent | 51b992ecec92b9dcca410a2c3716f45daca5afd1 (diff) | |
ARMv7 may not support Virtualization Extensions
ARMv7-A Virtualization extensions brings new instructions and resources
that were supported by later architectures. Reference ARM ARM Issue C.c
[DDI0406C_C].
ERET and extended MSR/MRS instructions, as specified in [DDI0406C_C] in
ID_PFR1 description of bits[15:12] (Virtualization Extensions):
A value of 0b0001 implies implementation of the HVC, ERET, MRS
(Banked register), and MSR (Banked register) instructions. The ID_ISARs
do not identify whether these instructions are implemented.
UDIV/SDIV were introduced with the Virtualization extensions, even if
not strictly related to the virtualization extensions.
If ARMv7 based platform does not set ARM_CORTEX_Ax=yes, platform
shall define ARMV7_SUPPORTS_VIRTUALIZATION to enable virtualization
extension related resources.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Diffstat (limited to 'common')
| -rw-r--r-- | common/aarch32/debug.S | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/common/aarch32/debug.S b/common/aarch32/debug.S index 583ee4a5..f5063569 100644 --- a/common/aarch32/debug.S +++ b/common/aarch32/debug.S @@ -71,7 +71,15 @@ endfunc report_exception assert_msg1: .asciz "ASSERT: File " assert_msg2: +#if ARM_ARCH_MAJOR == 7 && !defined(ARMV7_SUPPORTS_VIRTUALIZATION) + /****************************************************************** + * Virtualization comes with the UDIV/SDIV instructions. If missing + * write file line number in hexadecimal format. + ******************************************************************/ + .asciz " Line 0x" +#else .asciz " Line " +#endif /* --------------------------------------------------------------------------- * Assertion support in assembly. @@ -113,6 +121,13 @@ func asm_assert bne 1f mov r4, r6 +#if ARM_ARCH_MAJOR == 7 && !defined(ARMV7_SUPPORTS_VIRTUALIZATION) + /****************************************************************** + * Virtualization comes with the UDIV/SDIV instructions. If missing + * write file line number in hexadecimal format. + ******************************************************************/ + bl asm_print_hex +#else /* Print line number in decimal */ mov r6, #10 /* Divide by 10 after every loop iteration */ ldr r5, =MAX_DEC_DIVISOR @@ -124,6 +139,7 @@ dec_print_loop: udiv r5, r5, r6 /* Reduce divisor */ cmp r5, #0 bne dec_print_loop +#endif bl plat_crash_console_flush |