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| author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2018-01-29 11:42:42 +0800 |
|---|---|---|
| committer | Haojian Zhuang <haojian.zhuang@linaro.org> | 2018-03-05 09:51:33 +0800 |
| commit | a9b3021e145c7174f08465e88e6aba65a4099fdf (patch) | |
| tree | 46fd092c9247f1519f3dab7bf29b1b8794db23d0 /docs | |
| parent | 103c213c0d82f08cf72c3e4de435bab9683d4ed5 (diff) | |
hikey: clean dcache for SRAM after initialized
Although SRAM is initialized, DCACHE should be cleaned too.
Because MCU is a parrallel core to access SRAM. We need to make
sure that initialized value is really written to SRAM before
MCU using it.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Diffstat (limited to 'docs')
0 files changed, 0 insertions, 0 deletions