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authorJeenu Viswambharan <jeenu.viswambharan@arm.com>2017-09-22 08:32:09 +0100
committerJeenu Viswambharan <jeenu.viswambharan@arm.com>2017-10-16 16:50:01 +0100
commitfa9db4230aef4411cc6c56557f0c407326421876 (patch)
tree6ae9acc76ecca1db193c939e2b0d4ee538f2f52d /drivers
parenteb68ea9b10c190c237216dee92166f9e7b2ce3d4 (diff)
GICv2: Add driver API to set PE target mask
The PE target mask is used to translate linear PE index (returned by platform core position) to a bit mask used when targeting interrupts to a PE, viz. when raising SGIs and routing SPIs. The platform shall: - Populate the driver data with a pointer to array that's to contain per-PE target masks. - Invoke the new driver API 'gicv2_set_pe_target_mask()' during per-CPU initialization so that the driver populates the target mask for that CPU. Platforms that don't intend to target interrupts or raise SGIs need not populate this. Change-Id: Ic0db54da86915e9dccd82fff51479bc3c1fdc968 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/arm/gic/v2/gicv2_main.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/arm/gic/v2/gicv2_main.c b/drivers/arm/gic/v2/gicv2_main.c
index 7759a551..28266807 100644
--- a/drivers/arm/gic/v2/gicv2_main.c
+++ b/drivers/arm/gic/v2/gicv2_main.c
@@ -252,3 +252,26 @@ unsigned int gicv2_get_running_priority(void)
return gicc_read_rpr(driver_data->gicc_base);
}
+
+/*******************************************************************************
+ * This function sets the GICv2 target mask pattern for the current PE. The PE
+ * target mask is used to translate linear PE index (returned by platform core
+ * position) to a bit mask used when targeting interrupts to a PE, viz. when
+ * raising SGIs and routing SPIs.
+ ******************************************************************************/
+void gicv2_set_pe_target_mask(unsigned int proc_num)
+{
+ assert(driver_data);
+ assert(driver_data->gicd_base);
+ assert(driver_data->target_masks);
+ assert(proc_num < GICV2_MAX_TARGET_PE);
+ assert(proc_num < driver_data->target_masks_num);
+
+ /* Return if the target mask is already populated */
+ if (driver_data->target_masks[proc_num])
+ return;
+
+ /* Read target register corresponding to this CPU */
+ driver_data->target_masks[proc_num] =
+ gicv2_get_cpuif_id(driver_data->gicd_base);
+}