diff options
| author | Achin Gupta <achin.gupta@arm.com> | 2014-05-09 12:00:17 +0100 |
|---|---|---|
| committer | Achin Gupta <achin.gupta@arm.com> | 2014-05-22 17:47:20 +0100 |
| commit | fa9c08b7d117cb736911288668f9fd987505b4e3 (patch) | |
| tree | c935c5a3ab474265b51c2b1c8c53ec798e9fee2c /include/bl32 | |
| parent | dce74b891e0e6020d0a18384e32f280133631d9b (diff) | |
Use secure timer to generate S-EL1 interrupts
This patch adds support in the TSP to program the secure physical
generic timer to generate a EL-1 interrupt every half second. It also
adds support for maintaining the timer state across power management
operations. The TSPD ensures that S-EL1 can access the timer by
programming the SCR_EL3.ST bit.
This patch does not actually enable the timer. This will be done in a
subsequent patch once the complete framework for handling S-EL1
interrupts is in place.
Change-Id: I1b3985cfb50262f60824be3a51c6314ce90571bc
Diffstat (limited to 'include/bl32')
| -rw-r--r-- | include/bl32/payloads/tsp.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/bl32/payloads/tsp.h b/include/bl32/payloads/tsp.h index 1f542d53..385d09c2 100644 --- a/include/bl32/payloads/tsp.h +++ b/include/bl32/payloads/tsp.h @@ -196,6 +196,13 @@ extern tsp_args_t *tsp_cpu_off_main(uint64_t arg0, uint64_t arg5, uint64_t arg6, uint64_t arg7); + +/* Generic Timer functions */ +extern void tsp_generic_timer_start(void); +extern void tsp_generic_timer_handler(void); +extern void tsp_generic_timer_stop(void); +extern void tsp_generic_timer_save(void); +extern void tsp_generic_timer_restore(void); #endif /* __ASSEMBLY__ */ #endif /* __BL2_H__ */ |