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| author | Etienne Carriere <etienne.carriere@linaro.org> | 2017-09-01 10:22:20 +0200 |
|---|---|---|
| committer | Etienne Carriere <etienne.carriere@linaro.org> | 2017-09-01 10:22:20 +0200 |
| commit | 86606eb51e81b4189579e2b429f1c8f26f5c804c (patch) | |
| tree | ac4535b711a6744398802de913fc43a678090b95 /include/common | |
| parent | 096b7af7c93953673c0500156f482ad8c6da525e (diff) | |
cpu log buffer size depends on cache line size
Platform may use specific cache line sizes. Since CACHE_WRITEBACK_GRANULE
defines the platform specific cache line size, it is used to define the
size of the cpu data structure CPU_DATA_SIZE aligned on cache line size.
Introduce assembly macro 'mov_imm' for AArch32 to simplify implementation
of function '_cpu_data_by_index'.
Change-Id: Ic2d49ffe0c3e51649425fd9c8c99559c582ac5a1
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Diffstat (limited to 'include/common')
| -rw-r--r-- | include/common/aarch32/asm_macros.S | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/common/aarch32/asm_macros.S b/include/common/aarch32/asm_macros.S index 3adcbf51..f5737449 100644 --- a/include/common/aarch32/asm_macros.S +++ b/include/common/aarch32/asm_macros.S @@ -80,6 +80,19 @@ .endm /* + * Helper macro to generate the best mov/movw/movt combinations + * according to the value to be moved. + */ + .macro mov_imm _reg, _val + .if ((\_val) & 0xffff0000) == 0 + mov \_reg, #(\_val) + .else + movw \_reg, #((\_val) & 0xffff) + movt \_reg, #((\_val) >> 16) + .endif + .endm + + /* * Macro to mark instances where we're jumping to a function and don't * expect a return. To provide the function being jumped to with * additional information, we use 'bl' instruction to jump rather than |