diff options
| author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-01-11 15:29:36 +0000 |
|---|---|---|
| committer | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-01-29 09:58:57 +0000 |
| commit | d9bd656cf5a4d0c21597a956c3711d08626ecfd0 (patch) | |
| tree | 48eb356187fe2cc59032ae157d9de82e9c557c7d /include/lib | |
| parent | 6eabbb07d7ee2aac3a8e8e734649c8eaa8385af6 (diff) | |
Optimize/cleanup BPIALL workaround
In the initial implementation of this workaround we used a dedicated
workaround context to save/restore state. This patch reduces the
footprint as no additional context is needed.
Additionally, this patch reduces the memory loads and stores by 20%,
reduces the instruction count and exploits static branch prediction to
optimize the SMC path.
Change-Id: Ia9f6bf06fbf8a9037cfe7f1f1fb32e8aec38ec7d
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Diffstat (limited to 'include/lib')
| -rw-r--r-- | include/lib/el3_runtime/aarch64/context.h | 28 |
1 files changed, 2 insertions, 26 deletions
diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h index 5e212ec3..5f6bdc97 100644 --- a/include/lib/el3_runtime/aarch64/context.h +++ b/include/lib/el3_runtime/aarch64/context.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -46,26 +46,12 @@ #define CTX_GPREG_SP_EL0 U(0xf8) #define CTX_GPREGS_END U(0x100) -#if WORKAROUND_CVE_2017_5715 -#define CTX_CVE_2017_5715_OFFSET (CTX_GPREGS_OFFSET + CTX_GPREGS_END) -#define CTX_CVE_2017_5715_QUAD0 U(0x0) -#define CTX_CVE_2017_5715_QUAD1 U(0x8) -#define CTX_CVE_2017_5715_QUAD2 U(0x10) -#define CTX_CVE_2017_5715_QUAD3 U(0x18) -#define CTX_CVE_2017_5715_QUAD4 U(0x20) -#define CTX_CVE_2017_5715_QUAD5 U(0x28) -#define CTX_CVE_2017_5715_END U(0x30) -#else -#define CTX_CVE_2017_5715_OFFSET CTX_GPREGS_OFFSET -#define CTX_CVE_2017_5715_END CTX_GPREGS_END -#endif - /******************************************************************************* * Constants that allow assembler code to access members of and the 'el3_state' * structure at their correct offsets. Note that some of the registers are only * 32-bits wide but are stored as 64-bit values for convenience ******************************************************************************/ -#define CTX_EL3STATE_OFFSET (CTX_CVE_2017_5715_OFFSET + CTX_CVE_2017_5715_END) +#define CTX_EL3STATE_OFFSET (CTX_GPREGS_OFFSET + CTX_GPREGS_END) #define CTX_SCR_EL3 U(0x0) #define CTX_RUNTIME_SP U(0x8) #define CTX_SPSR_EL3 U(0x10) @@ -200,9 +186,6 @@ /* Constants to determine the size of individual context structures */ #define CTX_GPREG_ALL (CTX_GPREGS_END >> DWORD_SHIFT) -#if WORKAROUND_CVE_2017_5715 -#define CTX_CVE_2017_5715_ALL (CTX_CVE_2017_5715_END >> DWORD_SHIFT) -#endif #define CTX_SYSREG_ALL (CTX_SYSREGS_END >> DWORD_SHIFT) #if CTX_INCLUDE_FPREGS #define CTX_FPREG_ALL (CTX_FPREGS_END >> DWORD_SHIFT) @@ -218,10 +201,6 @@ */ DEFINE_REG_STRUCT(gp_regs, CTX_GPREG_ALL); -#if WORKAROUND_CVE_2017_5715 -DEFINE_REG_STRUCT(cve_2017_5715_regs, CTX_CVE_2017_5715_ALL); -#endif - /* * AArch64 EL1 system register context structure for preserving the * architectural state during switches from one security state to @@ -263,9 +242,6 @@ DEFINE_REG_STRUCT(el3_state, CTX_EL3STATE_ALL); */ typedef struct cpu_context { gp_regs_t gpregs_ctx; -#if WORKAROUND_CVE_2017_5715 - cve_2017_5715_regs_t cve_2017_5715_regs_ctx; -#endif el3_state_t el3state_ctx; el1_sys_regs_t sysregs_ctx; #if CTX_INCLUDE_FPREGS |