diff options
| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-10-24 11:47:13 +0100 |
|---|---|---|
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-11-13 08:38:51 +0000 |
| commit | 0bef0edffd7d2957704a74d37cdec91af7df39e3 (patch) | |
| tree | e4c9aae04ee14cfba4cb5051e75dc0a1df2937c5 /include/plat | |
| parent | 781f4aac76b56c059bb70b06b71a5c8ef2211844 (diff) | |
ARM platforms: Define exception macros
Define number of priority bits, and allocate priority levels for SDEI.
Change-Id: Ib6bb6c5c09397f7caef950c4caed5a737b3d4112
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'include/plat')
| -rw-r--r-- | include/plat/arm/common/arm_def.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index 9e82e298..5177b06e 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -454,5 +454,11 @@ */ #define PLAT_PERCPU_BAKERY_LOCK_SIZE (1 * CACHE_WRITEBACK_GRANULE) +/* Priority levels for ARM platforms */ +#define PLAT_SDEI_CRITICAL_PRI 0x60 +#define PLAT_SDEI_NORMAL_PRI 0x70 + +/* ARM platforms use 3 upper bits of secure interrupt priority */ +#define ARM_PRI_BITS 3 #endif /* __ARM_DEF_H__ */ |