diff options
| author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-03-12 14:47:09 +0000 |
|---|---|---|
| committer | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-03-14 11:19:53 +0000 |
| commit | a205a56ea891c354c642713701075fec28906c40 (patch) | |
| tree | 1628809d59852289308473302ff04414388b8737 /include | |
| parent | 3991a6a49f3cf8d0b30a2800428e60454e2f92dd (diff) | |
Fixup `SMCCC_ARCH_FEATURES` semantics
When querying `SMCCC_ARCH_WORKAROUND_1` through `SMCCC_ARCH_FEATURES`,
return either:
* -1 to indicate the PE on which `SMCCC_ARCH_FEATURES` is called
requires firmware mitigation for CVE-2017-5715 but the mitigation
is not compiled in.
* 0 to indicate that firmware mitigation is required, or
* 1 to indicate that no firmware mitigation is required.
This patch complies with v1.2 of the firmware interfaces
specification (ARM DEN 0070A).
Change-Id: Ibc32d6620efdac6c340758ec502d95554a55f02a
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/lib/cpus/aarch64/cpu_macros.S | 25 | ||||
| -rw-r--r-- | include/lib/cpus/workaround_cve_2017_5715.h | 12 |
2 files changed, 34 insertions, 3 deletions
diff --git a/include/lib/cpus/aarch64/cpu_macros.S b/include/lib/cpus/aarch64/cpu_macros.S index 6c3a5b99..8f0a74f0 100644 --- a/include/lib/cpus/aarch64/cpu_macros.S +++ b/include/lib/cpus/aarch64/cpu_macros.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -46,6 +46,8 @@ CPU_MIDR: /* cpu_ops midr */ CPU_RESET_FUNC: /* cpu_ops reset_func */ .space 8 #endif +CPU_EXTRA1_FUNC: + .space 8 #ifdef IMAGE_BL31 /* The power down core and cluster is needed only in BL31 */ CPU_PWR_DWN_OPS: /* cpu_ops power down functions */ .space (8 * CPU_MAX_PWR_DWN_OPS) @@ -113,6 +115,10 @@ CPU_OPS_SIZE = . * _resetfunc: * Reset function for the CPU. If there's no CPU reset function, * specify CPU_NO_RESET_FUNC + * _extra1: + * This is a placeholder for future per CPU operations. Currently, + * some CPUs use this entry to set a test function to determine if + * the workaround for CVE-2017-5715 needs to be applied or not. * _power_down_ops: * Comma-separated list of functions to perform power-down * operatios on the CPU. At least one, and up to @@ -122,8 +128,8 @@ CPU_OPS_SIZE = . * CPU_MAX_PWR_DWN_OPS functions, the last specified one will be * used to handle power down at subsequent levels */ - .macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \ - _power_down_ops:vararg + .macro declare_cpu_ops_base _name:req, _midr:req, _resetfunc:req, \ + _extra1:req, _power_down_ops:vararg .section cpu_ops, "a" .align 3 .type cpu_ops_\_name, %object @@ -131,6 +137,7 @@ CPU_OPS_SIZE = . #if defined(IMAGE_AT_EL3) .quad \_resetfunc #endif + .quad \_extra1 #ifdef IMAGE_BL31 1: /* Insert list of functions */ @@ -187,6 +194,18 @@ CPU_OPS_SIZE = . #endif .endm + .macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \ + _power_down_ops:vararg + declare_cpu_ops_base \_name, \_midr, \_resetfunc, 0, \ + \_power_down_ops + .endm + + .macro declare_cpu_ops_workaround_cve_2017_5715 _name:req, _midr:req, \ + _resetfunc:req, _extra1:req, _power_down_ops:vararg + declare_cpu_ops_base \_name, \_midr, \_resetfunc, \ + \_extra1, \_power_down_ops + .endm + #if REPORT_ERRATA /* * Print status of a CPU errata diff --git a/include/lib/cpus/workaround_cve_2017_5715.h b/include/lib/cpus/workaround_cve_2017_5715.h new file mode 100644 index 00000000..e837a673 --- /dev/null +++ b/include/lib/cpus/workaround_cve_2017_5715.h @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __WORKAROUND_CVE_2017_5715_H__ +#define __WORKAROUND_CVE_2017_5715_H__ + +int check_workaround_cve_2017_5715(void); + +#endif /* __WORKAROUND_CVE_2017_5715_H__ */ |