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| author | Etienne Carriere <etienne.carriere@linaro.org> | 2017-11-05 22:55:47 +0100 |
|---|---|---|
| committer | Etienne Carriere <etienne.carriere@linaro.org> | 2017-11-08 13:49:29 +0100 |
| commit | 0147bef523e27e26c0240fef4b47deca6720566c (patch) | |
| tree | f814f85c8fefbec6459e70737dd409e9ea7193b5 /lib | |
| parent | 70896274bac4b2c420f115fb71a677e516048797 (diff) | |
ARMv7 does not support STL instruction
Also need to add a SEV instruction in ARMv7 spin_unlock which
is implicit in ARMv8.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/locks/exclusive/aarch32/spinlock.S | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/locks/exclusive/aarch32/spinlock.S b/lib/locks/exclusive/aarch32/spinlock.S index bc77bc9c..9492cc08 100644 --- a/lib/locks/exclusive/aarch32/spinlock.S +++ b/lib/locks/exclusive/aarch32/spinlock.S @@ -9,6 +9,17 @@ .globl spin_lock .globl spin_unlock +#if ARM_ARCH_AT_LEAST(8, 0) +/* + * According to the ARMv8-A Architecture Reference Manual, "when the global + * monitor for a PE changes from Exclusive Access state to Open Access state, + * an event is generated.". This applies to both AArch32 and AArch64 modes of + * ARMv8-A. As a result, no explicit SEV with unlock is required. + */ +#define COND_SEV() +#else +#define COND_SEV() sev +#endif func spin_lock mov r2, #1 @@ -27,5 +38,6 @@ endfunc spin_lock func spin_unlock mov r1, #0 stl r1, [r0] + COND_SEV() bx lr endfunc spin_unlock |