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authorMasahiro Yamada <yamada.masahiro@socionext.com>2018-02-01 13:17:29 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2018-02-01 13:17:29 +0900
commit79c7e72829115117d0cdca50c0e1a789623d8ee9 (patch)
tree9c490dfc2961d00ab5e6e4377363e58a97892664 /lib
parente45820dc54ed5df7f22fbeeef9739ac67618ebd6 (diff)
misc_helpers: fix zero_normalmem() for BL2_AT_EL3
The assertion in zero_normalmem() fails for BL2_AT_EL3. This mode is executed in EL3, so it should check sctlr_el3 instead of sctlr_el1. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'lib')
-rw-r--r--lib/aarch64/misc_helpers.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/aarch64/misc_helpers.S b/lib/aarch64/misc_helpers.S
index 9dfe46a2..3c64d3ca 100644
--- a/lib/aarch64/misc_helpers.S
+++ b/lib/aarch64/misc_helpers.S
@@ -198,7 +198,7 @@ func zeromem_dczva
* Check for M bit (MMU enabled) of the current SCTLR_EL(1|3)
* register value and panic if the MMU is disabled.
*/
-#if defined(IMAGE_BL1) || defined(IMAGE_BL31)
+#if defined(IMAGE_BL1) || defined(IMAGE_BL31) || (defined(IMAGE_BL2) && BL2_AT_EL3)
mrs tmp1, sctlr_el3
#else
mrs tmp1, sctlr_el1