diff options
| author | Bai Ping <ping.bai@nxp.com> | 2017-10-27 09:21:20 +0800 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-11 10:08:40 +0300 |
| commit | e99625aa28002a66adc3de2e6352c571bf1a59d8 (patch) | |
| tree | aa9423e282b3329082af9d2281f7c882028f9246 /plat/imx/imx8mq | |
| parent | f62d4ae081d935ac0c77534b28445b0db157d041 (diff) | |
plat: imx8mq: add mmmap for aips1 space
map the whole AIPS1 space, so we don't need
to create map for individual peripheral region.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'plat/imx/imx8mq')
| -rw-r--r-- | plat/imx/imx8mq/imx8m_bl31_setup.c | 9 | ||||
| -rw-r--r-- | plat/imx/imx8mq/include/platform_def.h | 17 |
2 files changed, 11 insertions, 15 deletions
diff --git a/plat/imx/imx8mq/imx8m_bl31_setup.c b/plat/imx/imx8mq/imx8m_bl31_setup.c index dc81fb4c..0f510b2b 100644 --- a/plat/imx/imx8mq/imx8m_bl31_setup.c +++ b/plat/imx/imx8mq/imx8m_bl31_setup.c @@ -203,13 +203,8 @@ void bl31_plat_arch_setup(void) MT_MEMORY | MT_RO); mmap_add_region(IMX_BOOT_UART_BASE, IMX_BOOT_UART_BASE, 0x1000, MT_DEVICE | MT_RW); - mmap_add_region(IMX_SRC_BASE, IMX_SRC_BASE, - 0x1000, MT_DEVICE | MT_RW); - mmap_add_region(IMX_GPC_BASE, IMX_GPC_BASE, 0x1000, MT_DEVICE | MT_RW); - mmap_add_region(IMX_WDOG_BASE, IMX_WDOG_BASE, 0x1000, MT_DEVICE | MT_RW); - mmap_add_region(IMX_IOMUX_GPR_BASE, IMX_IOMUX_GPR_BASE, 0x1000, MT_DEVICE | MT_RW); - mmap_add_region(IMX_ANAMIX_BASE, IMX_ANAMIX_BASE, 0x1000, MT_DEVICE | MT_RW); - mmap_add_region(IMX_SNVS_BASE, IMX_SNVS_BASE, 0x1000, MT_DEVICE | MT_RW); + /* map the AIPS1 */ + mmap_add_region(IMX_AIPS1_BASE, IMX_AIPS1_BASE, 0x200000, MT_DEVICE | MT_RW); mmap_add_region(PLAT_GICD_BASE, PLAT_GICD_BASE, 0x80000, MT_DEVICE | MT_RW); mmap_add_region(PLAT_GICR_BASE, PLAT_GICR_BASE, 0x80000, diff --git a/plat/imx/imx8mq/include/platform_def.h b/plat/imx/imx8mq/include/platform_def.h index 3b370507..d4b9c9e5 100644 --- a/plat/imx/imx8mq/include/platform_def.h +++ b/plat/imx/imx8mq/include/platform_def.h @@ -35,7 +35,7 @@ #define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32) #define MAX_XLAT_TABLES 4 -#define MAX_MMAP_REGIONS 16 +#define MAX_MMAP_REGIONS 12 #define IMX_BOOT_UART_BASE 0x30860000 #define IMX_BOOT_UART_CLK_IN_HZ 25000000 /* Select 25Mhz oscillator */ @@ -43,13 +43,14 @@ #define PLAT__CRASH_UART_CLK_IN_HZ 25000000 #define IMX_CONSOLE_BAUDRATE 115200 -#define IMX_ANAMIX_BASE 0x30360000 -#define IMX_SRC_BASE 0x30390000 -#define IMX_GPC_BASE 0x303a0000 -#define IMX_WDOG_BASE 0x30280000 -#define IMX_SNVS_BASE 0x30370000 -#define IMX_TZASC_BASE 0x32F80000 -#define IMX_IOMUX_GPR_BASE 0x30340000 +#define IMX_AIPS1_BASE 0x30200000 +#define IMX_ANAMIX_BASE 0x30360000 +#define IMX_SRC_BASE 0x30390000 +#define IMX_GPC_BASE 0x303a0000 +#define IMX_WDOG_BASE 0x30280000 +#define IMX_SNVS_BASE 0x30370000 +#define IMX_TZASC_BASE 0x32F80000 +#define IMX_IOMUX_GPR_BASE 0x30340000 #define COUNTER_FREQUENCY 8000000 /* 8MHz */ |