Update to the latest SCFW API based on commit:

"
 commit 97b8a6eed4eee19ec8a60dedfffc2f5f3d8933c5
 Author: Chuck Cannon <chuck.cannon@freescale.com>
 Date:   Tue Feb 6 08:54:16 2018 -0600

        Add unique ID API call. Required to get info needed for SECO fuse
        programming. Added info command to DM.
"

Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>

3 files changed, 126 insertions, 142 deletions

diff --git a/plat/imx/common/include/sci/svc/pm/api.h b/plat/imx/common/include/sci/svc/pm/api.h
index 83ba8843..18c0a69c 100644
--- a/plat/imx/common/include/sci/svc/pm/api.h
+++ b/plat/imx/common/include/sci/svc/pm/api.h
@@ -220,7 +220,7 @@ sc_err_t sc_pm_set_sys_power_mode(sc_ipc_t ipc, sc_pm_power_mode_t mode);
  * All resources owned by \a pt that are on will have their power
  * mode changed to \a mode.
  *
- * @see sc_pm_set_partition_power_mode().
+ * @see sc_pm_set_resource_power_mode().
  */
 sc_err_t sc_pm_set_partition_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt,
     sc_pm_power_mode_t mode);
@@ -262,7 +262,7 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt,
  * resources in display and capture subsystems which require the display
  * controller or the imaging subsytem to be powered up first.
  *
- *  @see sc_pm_set_sys_power_mode().
+ *  @see sc_pm_set_partition_power_mode().
  */
 sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
     sc_pm_power_mode_t mode);
@@ -473,7 +473,8 @@ sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource,
  * @return Returns an error code (SC_ERR_NONE = success).
  *
  * Return errors:
- * - SC_ERR_PARM if invalid type
+ * - SC_ERR_PARM if invalid type,
+ * - SC_ERR_NOACCESS if caller not the owner of SC_R_SYSTEM
  *
  * If this function returns, then the reset did not occur due to an
  * invalid parameter.
diff --git a/plat/imx/common/include/sci/svc/timer/api.h b/plat/imx/common/include/sci/svc/timer/api.h
index 3d832eba..a4adc34a 100644
--- a/plat/imx/common/include/sci/svc/timer/api.h
+++ b/plat/imx/common/include/sci/svc/timer/api.h
@@ -120,22 +120,6 @@ sc_err_t sc_timer_set_wdog_pre_timeout(sc_ipc_t ipc,
     sc_timer_wdog_time_t pre_timeout);
 
 /*!
- * This function sets the watchdog pre-timeout in milliseconds. If not
- * set then the pre-timeout defaults to the max. Once locked this value
- * cannot be changed.
- *
- * @param[in]     ipc         IPC handle
- * @param[in]     pre_timeout pre-timeout period for the watchdog
- *
- * When the pre-timout expires an IRQ will be generated. Note this timeout
- * clears when the IRQ is triggered.
- *
- * @return Returns an error code (SC_ERR_NONE = success).
- */
-sc_err_t sc_timer_set_wdog_pre_timeout(sc_ipc_t ipc,
-				       sc_timer_wdog_time_t pre_timeout);
-
-/*!
  * This function starts the watchdog.
  *
  * @param[in]     ipc         IPC handle
@@ -310,21 +294,6 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon,
  */
 sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count);
 
-/*!
- * This function sets the RTC calibration value. Only the owner of the SC_R_SYSTEM
- * resource can set the calibration.
- *
- * @param[in]     ipc         IPC handle
- * @param[in]     count       calbration count (-16 to 15)
- *
- * The calibration value is a 5-bit value including the sign bit, which is
- * implemented in 2's complement. It is added or subtracted from the RTC on
- * a perdiodic basis, once per 32768 cycles of the RTC clock.
- *
- * @return Returns an error code (SC_ERR_NONE = success).
- */
-sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count);
-
 /* @} */
 
 #endif				/* _SC_TIMER_API_H */
diff --git a/plat/imx/common/include/sci/types.h b/plat/imx/common/include/sci/types.h
index c7058875..6f8021d5 100644
--- a/plat/imx/common/include/sci/types.h
+++ b/plat/imx/common/include/sci/types.h
@@ -23,61 +23,62 @@
  * @name Defines for common frequencies
  */
 /*@{*/
-#define SC_32KHZ            32768	/* 32KHz */
-#define SC_10MHZ         10000000	/* 10MHz */
-#define SC_20MHZ         20000000	/* 20MHz */
-#define SC_25MHZ         25000000	/* 25MHz */
-#define SC_27MHZ         27000000	/* 27MHz */
-#define SC_40MHZ         40000000	/* 40MHz */
-#define SC_45MHZ         45000000	/* 45MHz */
-#define SC_50MHZ         50000000	/* 50MHz */
-#define SC_60MHZ         60000000	/* 60MHz */
-#define SC_66MHZ         66666666	/* 66MHz */
-#define SC_74MHZ         74250000	/* 74.25MHz */
-#define SC_80MHZ         80000000	/* 80MHz */
-#define SC_83MHZ         83333333	/* 83MHz */
-#define SC_84MHZ         84375000	/* 84.37MHz */
-#define SC_100MHZ       100000000	/* 100MHz */
-#define SC_125MHZ       125000000	/* 125MHz */
-#define SC_133MHZ       133333333	/* 133MHz */
-#define SC_135MHZ       135000000	/* 135MHz */
-#define SC_150MHZ       150000000	/* 150MHz */
-#define SC_160MHZ       160000000	/* 160MHz */
-#define SC_166MHZ       166666666	/* 160MHz */
-#define SC_175MHZ       175000000	/* 175MHz */
-#define SC_180MHZ       180000000	/* 180MHz */
-#define SC_200MHZ       200000000	/* 200MHz */
-#define SC_250MHZ       250000000	/* 250MHz */
-#define SC_266MHZ       266666666	/* 266MHz */
-#define SC_300MHZ       300000000	/* 300MHz */
-#define SC_320MHZ       320000000	/* 320MHz */
-#define SC_325MHZ       325000000	/* 325MHz */
-#define SC_333MHZ       333333333	/* 333MHz */
-#define SC_350MHZ       350000000	/* 350MHz */
-#define SC_375MHZ       375000000	/* 375MHz */
-#define SC_400MHZ       400000000	/* 400MHz */
-#define SC_500MHZ       500000000	/* 500MHz */
-#define SC_594MHZ       594000000	/* 594MHz */
-#define SC_650MHZ       650000000	/* 650MHz */
-#define SC_667MHZ       666666667	/* 667MHz */
-#define SC_675MHZ       675000000	/* 675MHz */
-#define SC_700MHZ       700000000	/* 700MHz */
-#define SC_720MHZ       720000000	/* 720MHz */
-#define SC_750MHZ       750000000	/* 750MHz */
-#define SC_800MHZ       800000000	/* 800MHz */
-#define SC_850MHZ       850000000	/* 850MHz */
-#define SC_900MHZ       900000000	/* 900MHz */
-#define SC_1000MHZ     1000000000	/* 1GHz */
-#define SC_1056MHZ     1056000000	/* 1.056GHz */
-#define SC_1188MHZ     1188000000	/* 1.188GHz */
-#define SC_1260MHZ     1260000000	/* 1.26GHz */
-#define SC_1300MHZ     1300000000	/* 1.3GHz */
-#define SC_1400MHZ     1400000000	/* 1.4GHz */
-#define SC_1500MHZ     1500000000	/* 1.5GHz */
-#define SC_1600MHZ     1600000000	/* 1.6GHz */
-#define SC_1800MHZ     1800000000	/* 1.8GHz */
-#define SC_2000MHZ     2000000000	/* 2.0GHz */
-#define SC_2112MHZ     2112000000	/* 2.12GHz */
+#define SC_32KHZ            32768   /*!< 32KHz */
+#define SC_10MHZ         10000000   /*!< 10MHz */
+#define SC_20MHZ         20000000   /*!< 20MHz */
+#define SC_25MHZ         25000000   /*!< 25MHz */
+#define SC_27MHZ         27000000   /*!< 27MHz */
+#define SC_40MHZ         40000000   /*!< 40MHz */
+#define SC_45MHZ         45000000   /*!< 45MHz */
+#define SC_50MHZ         50000000   /*!< 50MHz */
+#define SC_60MHZ         60000000   /*!< 60MHz */
+#define SC_66MHZ         66666666   /*!< 66MHz */
+#define SC_74MHZ         74250000   /*!< 74.25MHz */
+#define SC_80MHZ         80000000   /*!< 80MHz */
+#define SC_83MHZ         83333333   /*!< 83MHz */
+#define SC_84MHZ         84375000   /*!< 84.37MHz */
+#define SC_100MHZ       100000000   /*!< 100MHz */
+#define SC_125MHZ       125000000   /*!< 125MHz */
+#define SC_133MHZ       133333333   /*!< 133MHz */
+#define SC_135MHZ       135000000   /*!< 135MHz */
+#define SC_150MHZ       150000000   /*!< 150MHz */
+#define SC_160MHZ       160000000   /*!< 160MHz */
+#define SC_166MHZ       166666666   /*!< 160MHz */
+#define SC_175MHZ       175000000   /*!< 175MHz */
+#define SC_180MHZ       180000000   /*!< 180MHz */
+#define SC_200MHZ       200000000   /*!< 200MHz */
+#define SC_250MHZ       250000000   /*!< 250MHz */
+#define SC_266MHZ       266666666   /*!< 266MHz */
+#define SC_300MHZ       300000000   /*!< 300MHz */
+#define SC_320MHZ       320000000   /*!< 320MHz */
+#define SC_325MHZ       325000000   /*!< 325MHz */
+#define SC_333MHZ       333333333   /*!< 333MHz */
+#define SC_350MHZ       350000000   /*!< 350MHz */
+#define SC_372MHZ       372000000   /*!< 372MHz */
+#define SC_375MHZ       375000000   /*!< 375MHz */
+#define SC_400MHZ       400000000   /*!< 400MHz */
+#define SC_500MHZ       500000000   /*!< 500MHz */
+#define SC_594MHZ       594000000   /*!< 594MHz */
+#define SC_650MHZ       650000000   /*!< 650MHz */
+#define SC_667MHZ       666666667   /*!< 667MHz */
+#define SC_675MHZ       675000000   /*!< 675MHz */
+#define SC_700MHZ       700000000   /*!< 700MHz */
+#define SC_720MHZ       720000000   /*!< 720MHz */
+#define SC_750MHZ       750000000   /*!< 750MHz */
+#define SC_800MHZ       800000000   /*!< 800MHz */
+#define SC_850MHZ       850000000   /*!< 850MHz */
+#define SC_900MHZ       900000000   /*!< 900MHz */
+#define SC_1000MHZ     1000000000   /*!< 1GHz */
+#define SC_1056MHZ     1056000000   /*!< 1.056GHz */
+#define SC_1188MHZ     1188000000   /*!< 1.188GHz */
+#define SC_1260MHZ     1260000000   /*!< 1.26GHz */
+#define SC_1300MHZ     1300000000   /*!< 1.3GHz */
+#define SC_1400MHZ     1400000000   /*!< 1.4GHz */
+#define SC_1500MHZ     1500000000   /*!< 1.5GHz */
+#define SC_1600MHZ     1600000000   /*!< 1.6GHz */
+#define SC_1800MHZ     1800000000   /*!< 1.8GHz */
+#define SC_2000MHZ     2000000000   /*!< 2.0GHz */
+#define SC_2112MHZ     2112000000   /*!< 2.12GHz */
 
 /*@}*/
 
@@ -85,56 +86,56 @@
  * @name Defines for 24M related frequencies
  */
 /*@{*/
-#define SC_8MHZ           8000000	/* 8MHz */
-#define SC_12MHZ         12000000	/* 12MHz */
-#define SC_19MHZ         19800000	/* 19.8MHz */
-#define SC_24MHZ         24000000	/* 24MHz */
-#define SC_48MHZ         48000000	/* 48MHz */
-#define SC_120MHZ       120000000	/* 120MHz */
-#define SC_132MHZ       132000000	/* 132MHz */
-#define SC_144MHZ       144000000	/* 144MHz */
-#define SC_192MHZ       192000000	/* 192MHz */
-#define SC_211MHZ       211200000	/* 211.2MHz */
-#define SC_240MHZ       240000000	/* 240MHz */
-#define SC_264MHZ       264000000	/* 264MHz */
-#define SC_352MHZ       352000000	/* 352MHz */
-#define SC_360MHZ       360000000	/* 360MHz */
-#define SC_384MHZ       384000000	/* 384MHz */
-#define SC_396MHZ       396000000	/* 396MHz */
-#define SC_432MHZ       432000000	/* 432MHz */
-#define SC_480MHZ       480000000	/* 480MHz */
-#define SC_600MHZ       600000000	/* 600MHz */
-#define SC_744MHZ       744000000	/* 744MHz */
-#define SC_792MHZ       792000000	/* 792MHz */
-#define SC_864MHZ       864000000	/* 864MHz */
-#define SC_960MHZ       960000000	/* 960MHz */
-#define SC_1056MHZ     1056000000	/* 1056MHz */
-#define SC_1200MHZ     1200000000	/* 1.2GHz */
-#define SC_1464MHZ     1464000000	/* 1.464GHz */
-#define SC_2400MHZ     2400000000	/* 2.4GHz */
+#define SC_8MHZ           8000000   /*!< 8MHz */
+#define SC_12MHZ         12000000   /*!< 12MHz */
+#define SC_19MHZ         19800000   /*!< 19.8MHz */
+#define SC_24MHZ         24000000   /*!< 24MHz */
+#define SC_48MHZ         48000000   /*!< 48MHz */
+#define SC_120MHZ       120000000   /*!< 120MHz */
+#define SC_132MHZ       132000000   /*!< 132MHz */
+#define SC_144MHZ       144000000   /*!< 144MHz */
+#define SC_192MHZ       192000000   /*!< 192MHz */
+#define SC_211MHZ       211200000   /*!< 211.2MHz */
+#define SC_240MHZ       240000000   /*!< 240MHz */
+#define SC_264MHZ       264000000   /*!< 264MHz */
+#define SC_352MHZ       352000000   /*!< 352MHz */
+#define SC_360MHZ       360000000   /*!< 360MHz */
+#define SC_384MHZ       384000000   /*!< 384MHz */
+#define SC_396MHZ       396000000   /*!< 396MHz */
+#define SC_432MHZ       432000000   /*!< 432MHz */
+#define SC_480MHZ       480000000   /*!< 480MHz */
+#define SC_600MHZ       600000000   /*!< 600MHz */
+#define SC_744MHZ       744000000   /*!< 744MHz */
+#define SC_792MHZ       792000000   /*!< 792MHz */
+#define SC_864MHZ       864000000   /*!< 864MHz */
+#define SC_960MHZ       960000000   /*!< 960MHz */
+#define SC_1056MHZ     1056000000   /*!< 1056MHz */
+#define SC_1200MHZ     1200000000   /*!< 1.2GHz */
+#define SC_1464MHZ     1464000000   /*!< 1.464GHz */
+#define SC_2400MHZ     2400000000   /*!< 2.4GHz */
 /*@}*/
 
 /*!
  * @name Defines for A/V related frequencies
  */
 /*@{*/
-#define SC_62MHZ         62937500	/* 62.9375MHz */
-#define SC_755MHZ       755250000	/* 755.25MHz */
+#define SC_62MHZ         62937500   /*!< 62.9375MHz */
+#define SC_755MHZ       755250000   /*!< 755.25MHz */
 /*@}*/
 
 /*!
  * @name Defines for type widths
  */
 /*@{*/
-#define SC_FADDR_W      36	/* Width of sc_faddr_t */
-#define SC_BOOL_W       1	/* Width of bool */
-#define SC_ERR_W        4	/* Width of sc_err_t */
-#define SC_RSRC_W       10	/* Width of sc_rsrc_t */
-#define SC_CTRL_W       6	/* Width of sc_ctrl_t */
+#define SC_FADDR_W      36          /*!< Width of sc_faddr_t */
+#define SC_BOOL_W       1           /*!< Width of bool */
+#define SC_ERR_W        4           /*!< Width of sc_err_t */
+#define SC_RSRC_W       10          /*!< Width of sc_rsrc_t */
+#define SC_CTRL_W       6           /*!< Width of sc_ctrl_t */
 /*@}*/
 
-#define SC_R_ALL        UINT16_MAX	/* All resources */
-#define SC_P_ALL        UINT16_MAX	/* All pads */
+#define SC_R_ALL        UINT16_MAX  /*!< All resources */
+#define SC_P_ALL        UINT16_MAX  /*!< All pads */
 
 /*!
  * This type is used to store a system (full-size) address.
@@ -144,19 +145,20 @@ typedef uint64_t sc_faddr_t;
 /*!
  * This type is used to indicate error response for most functions.
  */
-typedef enum sc_err_e {
-	SC_ERR_NONE = 0,	/* Success */
-	SC_ERR_VERSION = 1,	/* Incompatible API version */
-	SC_ERR_CONFIG = 2,	/* Configuration error */
-	SC_ERR_PARM = 3,	/* Bad parameter */
-	SC_ERR_NOACCESS = 4,	/* Permission error (no access) */
-	SC_ERR_LOCKED = 5,	/* Permission error (locked) */
-	SC_ERR_UNAVAILABLE = 6,	/* Unavailable (out of resources) */
-	SC_ERR_NOTFOUND = 7,	/* Not found */
-	SC_ERR_NOPOWER = 8,	/* No power */
-	SC_ERR_IPC = 9,		/* Generic IPC error */
-	SC_ERR_BUSY = 10,	/* Resource is currently busy/active */
-	SC_ERR_FAIL = 11,	/* General I/O failure */
+typedef enum sc_err_e
+{
+    SC_ERR_NONE         = 0,    /*!< Success */
+    SC_ERR_VERSION      = 1,    /*!< Incompatible API version */
+    SC_ERR_CONFIG       = 2,    /*!< Configuration error */
+    SC_ERR_PARM         = 3,    /*!< Bad parameter */
+    SC_ERR_NOACCESS     = 4,    /*!< Permission error (no access) */
+    SC_ERR_LOCKED       = 5,    /*!< Permission error (locked) */
+    SC_ERR_UNAVAILABLE  = 6,    /*!< Unavailable (out of resources) */
+    SC_ERR_NOTFOUND     = 7,    /*!< Not found */
+    SC_ERR_NOPOWER      = 8,    /*!< No power */
+    SC_ERR_IPC          = 9,    /*!< Generic IPC error */
+    SC_ERR_BUSY         = 10,   /*!< Resource is currently busy/active */
+    SC_ERR_FAIL         = 11,   /*!< General I/O failure */
     SC_ERR_LAST
 } sc_err_t;
 
@@ -165,7 +167,8 @@ typedef enum sc_err_e {
  * and bus masters (but not memory regions). Note items from list should
  * never be changed or removed (only added to at the end of the list).
  */
-typedef enum sc_rsrc_e {
+typedef enum sc_rsrc_e
+{
     SC_R_A53                = 0,
     SC_R_A53_0              = 1,
     SC_R_A53_1              = 2,
@@ -683,8 +686,8 @@ typedef enum sc_rsrc_e {
     SC_R_CAAM_JR1_OUT       = 514,
     SC_R_CAAM_JR2_OUT       = 515,
     SC_R_CAAM_JR3_OUT       = 516,
-    SC_R_VPU_DEC            = 517,
-    SC_R_VPU_ENC            = 518,
+    SC_R_VPU_DEC_0          = 517,
+    SC_R_VPU_ENC_0          = 518,
     SC_R_CAAM_JR0           = 519,
     SC_R_CAAM_JR0_OUT       = 520,
     SC_R_PMIC_2             = 521,
@@ -700,6 +703,13 @@ typedef enum sc_rsrc_e {
 	SC_R_BOARD_R7 = 531,
 	SC_R_MJPEG_DEC_MP = 532,
 	SC_R_MJPEG_ENC_MP = 533,
+    SC_R_VPU_TS_0           = 534,
+    SC_R_VPU_MU_0           = 535,
+    SC_R_VPU_MU_1           = 536,
+    SC_R_VPU_MU_2           = 537,
+    SC_R_VPU_MU_3           = 538,
+    SC_R_VPU_ENC_1          = 539,
+    SC_R_VPU                = 540,
     SC_R_LAST
 } sc_rsrc_t;
 
@@ -708,7 +718,8 @@ typedef enum sc_rsrc_e {
 /*!
  * This type is used to indicate a control.
  */
-typedef enum sc_ctrl_e {
+typedef enum sc_ctrl_e
+{
 
     SC_C_TEMP               = 0,
     SC_C_TEMP_HI            = 1,
@@ -753,6 +764,8 @@ typedef enum sc_ctrl_e {
 	SC_C_OFS_AUDIO = 40,
 	SC_C_OFS_PERIPH = 41,
 	SC_C_OFS_IRQ = 42,
+    SC_C_RST0               = 43,
+    SC_C_RST1               = 44,
     SC_C_LAST
 } sc_ctrl_t;
 
@@ -813,3 +826,4 @@ typedef uint16_t sc_pad_t;
 #endif
 
 #endif /* _SC_TYPES_H */
+