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-rw-r--r--include/bl1/bl1.h6
-rw-r--r--include/bl31/ehf.h4
-rw-r--r--include/bl32/sp_min/platform_sp_min.h4
-rw-r--r--include/common/bl_common.h7
-rw-r--r--include/common/desc_image_load.h2
-rw-r--r--include/common/fdt_wrappers.h19
-rw-r--r--include/common/tbbr/tbbr_img_def.h17
-rw-r--r--include/lib/cpus/aarch64/cortex_a75.h30
-rw-r--r--include/lib/cpus/aarch64/cpuamu.h48
-rw-r--r--include/lib/extensions/spe.h3
-rw-r--r--include/lib/extensions/sve.h3
-rw-r--r--include/plat/arm/board/common/board_arm_def.h2
-rw-r--r--include/plat/arm/common/arm_def.h8
-rw-r--r--include/plat/arm/common/arm_dyn_cfg_helpers.h16
-rw-r--r--include/plat/arm/common/plat_arm.h22
-rw-r--r--include/plat/common/platform.h21
-rw-r--r--include/tools_share/firmware_image_package.h7
-rw-r--r--include/tools_share/tbbr_oid.h5
18 files changed, 167 insertions, 57 deletions
diff --git a/include/bl1/bl1.h b/include/bl1/bl1.h
index 15445235..b0421007 100644
--- a/include/bl1/bl1.h
+++ b/include/bl1/bl1.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -71,5 +71,9 @@ CASSERT(FWU_NUM_SMC_CALLS == \
(FWU_SMC_FID_END - FWU_SMC_FID_START + 1),\
assert_FWU_NUM_SMC_CALLS_mismatch);
+/* Utility functions */
+void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
+ meminfo_t *bl2_mem_layout);
+
#endif /* __ASSEMBLY__ */
#endif /* __BL1_FWU_H__ */
diff --git a/include/bl31/ehf.h b/include/bl31/ehf.h
index be8c957c..f963f8d0 100644
--- a/include/bl31/ehf.h
+++ b/include/bl31/ehf.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -82,7 +82,7 @@ void ehf_init(void);
void ehf_activate_priority(unsigned int priority);
void ehf_deactivate_priority(unsigned int priority);
void ehf_register_priority_handler(unsigned int pri, ehf_handler_t handler);
-void ehf_allow_ns_preemption(void);
+void ehf_allow_ns_preemption(uint64_t preempt_ret_code);
unsigned int ehf_is_ns_preemption_allowed(void);
#endif /* __ASSEMBLY__ */
diff --git a/include/bl32/sp_min/platform_sp_min.h b/include/bl32/sp_min/platform_sp_min.h
index 6c7e0cc0..8f6a82d9 100644
--- a/include/bl32/sp_min/platform_sp_min.h
+++ b/include/bl32/sp_min/platform_sp_min.h
@@ -10,8 +10,12 @@
/*******************************************************************************
* Mandatory SP_MIN functions
******************************************************************************/
+#if !ERROR_DEPRECATED
void sp_min_early_platform_setup(void *from_bl2,
void *plat_params_from_bl2);
+#endif
+void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1,
+ u_register_t arg2, u_register_t arg3);
void sp_min_platform_setup(void);
void sp_min_plat_runtime_setup(void);
void sp_min_plat_arch_setup(void);
diff --git a/include/common/bl_common.h b/include/common/bl_common.h
index 8915ba06..6a249f5b 100644
--- a/include/common/bl_common.h
+++ b/include/common/bl_common.h
@@ -9,6 +9,7 @@
#include <ep_info.h>
#include <param_header.h>
+#include <utils_def.h>
#define UP 1
#define DOWN 0
@@ -31,10 +32,10 @@
#define IMAGE_STATE_EXECUTED 4
#define IMAGE_STATE_INTERRUPTED 5
-#define IMAGE_ATTRIB_SKIP_LOADING 0x02
-#define IMAGE_ATTRIB_PLAT_SETUP 0x04
+#define IMAGE_ATTRIB_SKIP_LOADING U(0x02)
+#define IMAGE_ATTRIB_PLAT_SETUP U(0x04)
-#define INVALID_IMAGE_ID (0xFFFFFFFF)
+#define INVALID_IMAGE_ID U(0xFFFFFFFF)
/*******************************************************************************
* Constants to indicate type of exception to the common exception handler.
diff --git a/include/common/desc_image_load.h b/include/common/desc_image_load.h
index 79f2bd7b..f183db50 100644
--- a/include/common/desc_image_load.h
+++ b/include/common/desc_image_load.h
@@ -33,7 +33,7 @@ int get_bl_params_node_index(unsigned int image_id);
bl_mem_params_node_t *get_bl_mem_params_node(unsigned int image_id);
bl_load_info_t *get_bl_load_info_from_mem_params_desc(void);
bl_params_t *get_next_bl_params_from_mem_params_desc(void);
-
+void populate_next_bl_params_config(bl_params_t *bl2_to_next_bl_params);
#endif /* LOAD_IMAGE_V2 */
#endif /* __DESC_IMAGE_LOAD_H__ */
diff --git a/include/common/fdt_wrappers.h b/include/common/fdt_wrappers.h
new file mode 100644
index 00000000..18a6d103
--- /dev/null
+++ b/include/common/fdt_wrappers.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/* Helper functions to offer easier navigation of Device Tree Blob */
+
+#ifndef __FDT_WRAPPERS__
+#define __FDT_WRAPPERS__
+
+/* Number of cells, given total length in bytes. Each cell is 4 bytes long */
+#define NCELLS(len) ((len) / 4)
+
+int fdtw_read_cells(const void *dtb, int node, const char *prop,
+ unsigned int cells, void *value);
+int fdtw_write_inplace_cells(void *dtb, int node, const char *prop,
+ unsigned int cells, void *value);
+#endif /* __FDT_WRAPPERS__ */
diff --git a/include/common/tbbr/tbbr_img_def.h b/include/common/tbbr/tbbr_img_def.h
index 3e68b648..060198bc 100644
--- a/include/common/tbbr/tbbr_img_def.h
+++ b/include/common/tbbr/tbbr_img_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -60,4 +60,19 @@
/* Secure Payload BL32_EXTRA2 (Trusted OS Extra2) */
#define BL32_EXTRA2_IMAGE_ID 22
+/* HW_CONFIG (e.g. Kernel DT) */
+#define HW_CONFIG_ID 23
+
+/* TB_FW_CONFIG */
+#define TB_FW_CONFIG_ID 24
+
+/* SOC_FW_CONFIG */
+#define SOC_FW_CONFIG_ID 25
+
+/* TOS_FW_CONFIG */
+#define TOS_FW_CONFIG_ID 26
+
+/* NT_FW_CONFIG */
+#define NT_FW_CONFIG_ID 27
+
#endif /* __TBBR_IMG_DEF_H__ */
diff --git a/include/lib/cpus/aarch64/cortex_a75.h b/include/lib/cpus/aarch64/cortex_a75.h
index 940125da..20f02518 100644
--- a/include/lib/cpus/aarch64/cortex_a75.h
+++ b/include/lib/cpus/aarch64/cortex_a75.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -19,28 +19,6 @@
/* Definitions of register field mask in CORTEX_A75_CPUPWRCTLR_EL1 */
#define CORTEX_A75_CORE_PWRDN_EN_MASK 0x1
-/*******************************************************************************
- * CPU Activity Monitor Unit register specific definitions.
- ******************************************************************************/
-#define CPUAMCNTENCLR_EL0 S3_3_C15_C9_7
-#define CPUAMCNTENSET_EL0 S3_3_C15_C9_6
-#define CPUAMCFGR_EL0 S3_3_C15_C10_6
-#define CPUAMUSERENR_EL0 S3_3_C15_C10_7
-
-/* Activity Monitor Event Counter Registers */
-#define CPUAMEVCNTR0_EL0 S3_3_C15_C9_0
-#define CPUAMEVCNTR1_EL0 S3_3_C15_C9_1
-#define CPUAMEVCNTR2_EL0 S3_3_C15_C9_2
-#define CPUAMEVCNTR3_EL0 S3_3_C15_C9_3
-#define CPUAMEVCNTR4_EL0 S3_3_C15_C9_4
-
-/* Activity Monitor Event Type Registers */
-#define CPUAMEVTYPER0_EL0 S3_3_C15_C10_0
-#define CPUAMEVTYPER1_EL0 S3_3_C15_C10_1
-#define CPUAMEVTYPER2_EL0 S3_3_C15_C10_2
-#define CPUAMEVTYPER3_EL0 S3_3_C15_C10_3
-#define CPUAMEVTYPER4_EL0 S3_3_C15_C10_4
-
#define CORTEX_A75_ACTLR_AMEN_BIT (U(1) << 4)
/*
@@ -50,9 +28,9 @@
* CPUAMEVTYPER<n> register and are disabled by default. Platforms may
* enable this with suitable programming.
*/
-#define CORTEX_A75_AMU_NR_COUNTERS 5
-#define CORTEX_A75_AMU_GROUP0_MASK 0x7
-#define CORTEX_A75_AMU_GROUP1_MASK (0 << 3)
+#define CORTEX_A75_AMU_NR_COUNTERS U(5)
+#define CORTEX_A75_AMU_GROUP0_MASK U(0x7)
+#define CORTEX_A75_AMU_GROUP1_MASK (U(0) << 3)
#ifndef __ASSEMBLY__
#include <stdint.h>
diff --git a/include/lib/cpus/aarch64/cpuamu.h b/include/lib/cpus/aarch64/cpuamu.h
new file mode 100644
index 00000000..960a5248
--- /dev/null
+++ b/include/lib/cpus/aarch64/cpuamu.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __CPUAMU_H__
+#define __CPUAMU_H__
+
+/*******************************************************************************
+ * CPU Activity Monitor Unit register specific definitions.
+ ******************************************************************************/
+#define CPUAMCNTENCLR_EL0 S3_3_C15_C9_7
+#define CPUAMCNTENSET_EL0 S3_3_C15_C9_6
+#define CPUAMCFGR_EL0 S3_3_C15_C10_6
+#define CPUAMUSERENR_EL0 S3_3_C15_C10_7
+
+/* Activity Monitor Event Counter Registers */
+#define CPUAMEVCNTR0_EL0 S3_3_C15_C9_0
+#define CPUAMEVCNTR1_EL0 S3_3_C15_C9_1
+#define CPUAMEVCNTR2_EL0 S3_3_C15_C9_2
+#define CPUAMEVCNTR3_EL0 S3_3_C15_C9_3
+#define CPUAMEVCNTR4_EL0 S3_3_C15_C9_4
+
+/* Activity Monitor Event Type Registers */
+#define CPUAMEVTYPER0_EL0 S3_3_C15_C10_0
+#define CPUAMEVTYPER1_EL0 S3_3_C15_C10_1
+#define CPUAMEVTYPER2_EL0 S3_3_C15_C10_2
+#define CPUAMEVTYPER3_EL0 S3_3_C15_C10_3
+#define CPUAMEVTYPER4_EL0 S3_3_C15_C10_4
+
+#ifndef __ASSEMBLY__
+#include <stdint.h>
+
+uint64_t cpuamu_cnt_read(int idx);
+void cpuamu_cnt_write(int idx, uint64_t val);
+unsigned int cpuamu_read_cpuamcntenset_el0(void);
+unsigned int cpuamu_read_cpuamcntenclr_el0(void);
+void cpuamu_write_cpuamcntenset_el0(unsigned int mask);
+void cpuamu_write_cpuamcntenclr_el0(unsigned int mask);
+
+int midr_match(unsigned int cpu_midr);
+void cpuamu_context_save(unsigned int nr_counters);
+void cpuamu_context_restore(unsigned int nr_counters);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __CPUAMU_H__ */
diff --git a/include/lib/extensions/spe.h b/include/lib/extensions/spe.h
index 8a74127a..b2b188ef 100644
--- a/include/lib/extensions/spe.h
+++ b/include/lib/extensions/spe.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -7,6 +7,7 @@
#ifndef __SPE_H__
#define __SPE_H__
+int spe_supported(void);
void spe_enable(int el2_unused);
void spe_disable(void);
diff --git a/include/lib/extensions/sve.h b/include/lib/extensions/sve.h
index 28923e3f..9c7f37f2 100644
--- a/include/lib/extensions/sve.h
+++ b/include/lib/extensions/sve.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -7,6 +7,7 @@
#ifndef __SVE_H__
#define __SVE_H__
+int sve_supported(void);
void sve_enable(int el2_unused);
#endif /* __SVE_H__ */
diff --git a/include/plat/arm/board/common/board_arm_def.h b/include/plat/arm/board/common/board_arm_def.h
index 888629e3..12a21fb7 100644
--- a/include/plat/arm/board/common/board_arm_def.h
+++ b/include/plat/arm/board/common/board_arm_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index 697a0b04..9e6c7d27 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -306,6 +306,12 @@
*/
#define CACHE_WRITEBACK_GRANULE (1 << ARM_CACHE_WRITEBACK_SHIFT)
+/*
+ * To enable TB_FW_CONFIG to be loaded by BL1, define the corresponding base
+ * and limit. Leave enough space of BL2 meminfo.
+ */
+#define ARM_TB_FW_CONFIG_BASE ARM_BL_RAM_BASE + sizeof(meminfo_t)
+#define ARM_TB_FW_CONFIG_LIMIT BL2_LIMIT
/*******************************************************************************
* BL1 specific defines.
diff --git a/include/plat/arm/common/arm_dyn_cfg_helpers.h b/include/plat/arm/common/arm_dyn_cfg_helpers.h
new file mode 100644
index 00000000..4a0f6397
--- /dev/null
+++ b/include/plat/arm/common/arm_dyn_cfg_helpers.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef __ARM_DYN_CFG_HELPERS_H__
+#define __ARM_DYN_CFG_HELPERS_H__
+
+#include <stdint.h>
+
+/* Function declaration */
+int arm_dyn_get_hwconfig_info(void *dtb, int node,
+ uint64_t *hw_config_addr, uint32_t *hw_config_size);
+int arm_dyn_tb_fw_cfg_init(void *dtb, int *node);
+
+#endif /* __ARM_DYN_CFG_HELPERS_H__ */
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index dfd7a204..b2c7bd27 100644
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -19,6 +19,7 @@
struct bl31_params;
struct meminfo;
struct image_info;
+struct bl_params;
#define ARM_CASSERT_MMAP \
CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \
@@ -138,7 +139,7 @@ void arm_bl1_platform_setup(void);
void arm_bl1_plat_arch_setup(void);
/* BL2 utility functions */
-void arm_bl2_early_platform_setup(struct meminfo *mem_layout);
+void arm_bl2_early_platform_setup(uintptr_t tb_fw_config, struct meminfo *mem_layout);
void arm_bl2_platform_setup(void);
void arm_bl2_plat_arch_setup(void);
uint32_t arm_get_spsr_for_bl32_entry(void);
@@ -157,11 +158,11 @@ void arm_bl2u_plat_arch_setup(void);
/* BL31 utility functions */
#if LOAD_IMAGE_V2
-void arm_bl31_early_platform_setup(void *from_bl2,
- void *plat_params_from_bl2);
+void arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
+ uintptr_t hw_config, void *plat_params_from_bl2);
#else
-void arm_bl31_early_platform_setup(struct bl31_params *from_bl2,
- void *plat_params_from_bl2);
+void arm_bl31_early_platform_setup(struct bl31_params *from_bl2, uintptr_t soc_fw_config,
+ uintptr_t hw_config, void *plat_params_from_bl2);
#endif /* LOAD_IMAGE_V2 */
void arm_bl31_platform_setup(void);
void arm_bl31_plat_runtime_setup(void);
@@ -171,13 +172,18 @@ void arm_bl31_plat_arch_setup(void);
void arm_tsp_early_platform_setup(void);
/* SP_MIN utility functions */
-void arm_sp_min_early_platform_setup(void *from_bl2,
- void *plat_params_from_bl2);
+void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
+ uintptr_t hw_config, void *plat_params_from_bl2);
void arm_sp_min_plat_runtime_setup(void);
/* FIP TOC validity check */
int arm_io_is_toc_valid(void);
+/* Utility functions for Dynamic Config */
+void arm_load_tb_fw_config(void);
+void arm_bl2_set_tb_cfg_addr(void *dtb);
+void arm_bl2_dyn_cfg_init(void);
+
/*
* Mandatory functions required in ARM standard platforms
*/
diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h
index e2f1cfdc..411202da 100644
--- a/include/plat/common/platform.h
+++ b/include/plat/common/platform.h
@@ -134,9 +134,10 @@ int bl1_plat_mem_check(uintptr_t mem_base, unsigned int mem_size,
/*******************************************************************************
* Optional BL1 functions (may be overridden)
******************************************************************************/
+#if !ERROR_DEPRECATED
void bl1_init_bl2_mem_layout(const struct meminfo *bl1_mem_layout,
struct meminfo *bl2_mem_layout);
-
+#endif
/*
* The following functions are used for image loading process in BL1.
*/
@@ -155,20 +156,20 @@ struct image_desc *bl1_plat_get_image_desc(unsigned int image_id);
*/
__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved);
-#if LOAD_IMAGE_V2
/*
- * This function can be used by the platforms to update/use image
- * information for BL2.
+ * This BL1 function can be used by the platforms to update/use image
+ * information for a given `image_id`.
*/
-int bl1_plat_handle_pre_image_load(void);
-int bl1_plat_handle_post_image_load(void);
-
-#endif /* LOAD_IMAGE_V2 */
+int bl1_plat_handle_pre_image_load(unsigned int image_id);
+int bl1_plat_handle_post_image_load(unsigned int image_id);
/*******************************************************************************
* Mandatory BL2 functions
******************************************************************************/
+void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3);
+#if !ERROR_DEPRECATED
void bl2_early_platform_setup(struct meminfo *mem_layout);
+#endif
void bl2_plat_arch_setup(void);
void bl2_platform_setup(void);
struct meminfo *bl2_plat_sec_mem_layout(void);
@@ -280,6 +281,7 @@ int bl2u_plat_handle_scp_bl2u(void);
/*******************************************************************************
* Mandatory BL31 functions
******************************************************************************/
+#if !ERROR_DEPRECATED
#if LOAD_IMAGE_V2
void bl31_early_platform_setup(void *from_bl2,
void *plat_params_from_bl2);
@@ -287,6 +289,9 @@ void bl31_early_platform_setup(void *from_bl2,
void bl31_early_platform_setup(struct bl31_params *from_bl2,
void *plat_params_from_bl2);
#endif
+#endif /* ERROR_DEPRECATED */
+void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
+ u_register_t arg2, u_register_t arg3);
void bl31_plat_arch_setup(void);
void bl31_platform_setup(void);
void bl31_plat_runtime_setup(void);
diff --git a/include/tools_share/firmware_image_package.h b/include/tools_share/firmware_image_package.h
index c39e6f02..b7fac07f 100644
--- a/include/tools_share/firmware_image_package.h
+++ b/include/tools_share/firmware_image_package.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -63,6 +63,11 @@
{0x11449fa4, 0x635e, 0x11e4, 0x87, 0x28, {0x3f, 0x05, 0x72, 0x2a, 0xf3, 0x3d} }
#define UUID_NON_TRUSTED_FW_CONTENT_CERT \
{0xf3c1c48e, 0x635d, 0x11e4, 0xa7, 0xa9, {0x87, 0xee, 0x40, 0xb2, 0x3f, 0xa7} }
+/* Dynamic configs */
+#define UUID_HW_CONFIG \
+ {0xd9f1b808, 0xcfc9, 0x4993, 0xa9, 0x62, {0x6f, 0xbc, 0x6b, 0x72, 0x65, 0xcc} }
+#define UUID_TB_FW_CONFIG \
+ {0xff58046c, 0x6baf, 0x4f7d, 0x82, 0xed, {0xaa, 0x27, 0xbc, 0x69, 0xbf, 0xd2} }
typedef struct fip_toc_header {
uint32_t name;
diff --git a/include/tools_share/tbbr_oid.h b/include/tools_share/tbbr_oid.h
index e57790c6..18ddbdc2 100644
--- a/include/tools_share/tbbr_oid.h
+++ b/include/tools_share/tbbr_oid.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -41,7 +41,8 @@
/* TrustedBootFirmwareHash - BL2 */
#define TRUSTED_BOOT_FW_HASH_OID "1.3.6.1.4.1.4128.2100.201"
-
+#define TRUSTED_BOOT_FW_CONFIG_HASH_OID "1.3.6.1.4.1.4128.2100.202"
+#define HW_CONFIG_HASH_OID "1.3.6.1.4.1.4128.2100.203"
/*
* Trusted Key Certificate