diff options
author | Ryan QIAN <b32804@freescale.com> | 2012-02-24 16:48:53 +0800 |
---|---|---|
committer | Zhang Jiejing <jiejing.zhang@freescale.com> | 2012-02-27 14:12:37 +0800 |
commit | f027d501ddce904c9d06152defe70728e84b3861 (patch) | |
tree | f694388ab5c42934774bc822417751633bf66d0a | |
parent | cbda2535bee5ba7c719b4688ce569c9c777d034e (diff) |
ENGR00175321 [MX6]MMCSD: eMMC4.4 failed to work after resume
- clear ddr_en bit on non ddr timing mode in platform code.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
-rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index a7794df81d37..2b450421439b 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -312,8 +312,13 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) orig_reg |= (val & SDHCI_CTRL_TUNED_CLK) ? 0 : SDHCI_MIX_CTRL_SMPCLK_SEL; - orig_reg |= (val & SDHCI_CTRL_UHS_DDR50) - ? SDHCI_MIX_CTRL_DDREN : 0; + if (val & SDHCI_CTRL_UHS_DDR50) { + orig_reg |= SDHCI_MIX_CTRL_DDREN; + imx_data->scratchpad |= SDHCI_MIX_CTRL_DDREN; + } else { + orig_reg &= ~SDHCI_MIX_CTRL_DDREN; + imx_data->scratchpad &= ~SDHCI_MIX_CTRL_DDREN; + } writel(orig_reg, host->ioaddr + SDHCI_MIX_CTRL); /* set clock frequency again */ @@ -523,8 +528,6 @@ static int plt_8bit_width(struct sdhci_host *host, int width) reg |= SDHCI_PROT_CTRL_8BIT; else if (width == MMC_BUS_WIDTH_4) reg |= SDHCI_PROT_CTRL_4BIT; - else if (width == MMC_BUS_WIDTH_1) - host->mmc->ios.ddr = 0; writel(reg, host->ioaddr + SDHCI_HOST_CONTROL); return 0; |