diff options
| author | Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> | 2014-10-03 12:01:14 -0500 |
|---|---|---|
| committer | Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> | 2014-10-07 09:57:24 -0500 |
| commit | 31eaa38427340fb50249d861b1cd3bce0ca18c8b (patch) | |
| tree | 988f0039c6bc0dd7a2b02cb4574b28eff66ff877 | |
| parent | c562446f8ad3d49fbfcddea0e4843eb529136eb8 (diff) | |
MLK-9663 imx6x:Fix the DDR self-refresh entry procedure in suspend code.
During suspend resume we only need to ensure that DDR is put self-refresh. There
is no need to set the CON_REQ bit as we are not re-calibrating the DDR.
Setting the CON_REQ bit requires that the SW needs to wait for the CON_ACK bit
to be set before proceeding further. And under certain circumstances the MMDC
does set the CON_ACK bit and the SW is waiting for ever until the watch dog resets
the system.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/mx6_suspend.S | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/arch/arm/mach-mx6/mx6_suspend.S b/arch/arm/mach-mx6/mx6_suspend.S index fdecbd2bf417..f99ad7bdf0b7 100644 --- a/arch/arm/mach-mx6/mx6_suspend.S +++ b/arch/arm/mach-mx6/mx6_suspend.S @@ -1202,42 +1202,12 @@ set ddr iomux to low power mode ldr r1, =MMDC_P0_BASE_ADDR add r1, r1, #PERIPBASE_VIRT - /* set SBS_EN to block DDR access */ - ldr r0, [r1, #0x410] - orr r0, r0, #0x100 - str r0, [r1, #0x410] - /* Put DDR explicitly into self-refresh. */ /* Disable Automatic power savings. */ ldr r0, [r1, #0x404] orr r0, r0, #0x01 str r0, [r1, #0x404] - /* set CON_REG */ - ldr r0, =0x8000 - str r0, [r1, #0x1C] -poll_conreq_set_1: - ldr r0, [r1, #0x1C] - and r0, r0, #0x4000 - cmp r0, #0x4000 - bne poll_conreq_set_1 - - /*setmem /32 0x021b001c = 0x00008010 //Precharge all on cs0 */ - /*setmem /32 0x021b001c = 0x00008018 //Precharge all on cs1 */ - ldr r0, =0x00008010 - str r0, [r1, #0x1C] - ldr r0, =0x00008018 - str r0, [r1, #0x1C] - - /* de-assert con_req */ - mov r0, #0x0 - str r0, [r1, #0x1C] -poll_conreq_clr_1: - ldr r0, [r1, #0x1C] - and r0, r0, #0x4000 - cmp r0, #0x4000 - beq poll_conreq_clr_1 - /* Make the DDR explicitly enter self-refresh. */ ldr r0, [r1, #0x404] orr r0, r0, #0x200000 @@ -1698,11 +1668,6 @@ poll_dvfs_clear_2: cmp r6, #0x2000000 beq poll_dvfs_clear_2 - /* clear SBS - unblock DDR accesses */ - ldr r6, [r1, #0x410] - bic r6, r6, #0x100 - str r6, [r1, #0x410] - /* Enable Automatic power savings. */ ldr r6, [r1, #0x404] bic r6, r6, #0x01 |