diff options
| author | Peter Chen <peter.chen@freescale.com> | 2015-07-10 15:32:44 +0800 |
|---|---|---|
| committer | Peter Chen <peter.chen@freescale.com> | 2015-07-13 09:31:22 +0800 |
| commit | 0c903fac6bc0a925f7e5bec4c894f3e04a40d70f (patch) | |
| tree | bffddf071410f1d56651e81dc6cbb39353df5123 | |
| parent | 7a5b5a69c97829432cc88c14ff5a851addec8ece (diff) | |
MLK-11235-2 ARM: imx7d.dtsi: add USB HSIC support
There are two power supplied for USB HSIC, one is VDD_1P2_CAP, another
is VDD_HSIC_1P0. The VDD_1P2_CAP is analog reg which can be controlled
by PMU, but we set the override bit and let the gpc control it, without
this setting, the USB module can't get the clock properly.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
| -rw-r--r-- | arch/arm/boot/dts/imx7d.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 73c104c06082..61df71a8961f 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -607,6 +607,20 @@ anatop-max-voltage = <1200000>; anatop-enable-bit = <31>; }; + + reg_1p2: regulator-vdd1p2@220 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd1p2"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + anatop-reg-offset = <0x220>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <8>; + anatop-min-voltage = <1100000>; + anatop-max-voltage = <1300000>; + anatop-enable-bit = <31>; + }; }; tempmon: tempmon { @@ -669,6 +683,7 @@ #power-domain-cells = <1>; pcie-phy-supply = <®_1p0d>; mipi-phy-supply = <®_1p0d>; + vcc-supply = <®_1p2>; }; }; @@ -1242,6 +1257,7 @@ compatible = "usb-nop-xceiv"; clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>; clock-names = "main_clk"; + vcc-supply = <®_1p2>; }; usdhc1: usdhc@30b40000 { |