diff options
| author | Tom Cherry <tcherry@nvidia.com> | 2011-03-21 15:35:59 -0700 |
|---|---|---|
| committer | Niket Sirsi <nsirsi@nvidia.com> | 2011-03-23 17:18:26 -0800 |
| commit | eace7a34bbfed26d4294ba3cb64694f0d7a7f88a (patch) | |
| tree | d174d4cb5b0dd98ad89fad66d65ebbac2b83eeba | |
| parent | 1e20fb189cccf98a800dfbd3b7031626b35019ab (diff) | |
video: tegra: dsi: Set dsi clock in multiples of Mhz
Change-Id: I82081f6e4e3646fbf7c265851e548ca64b2415db
Reviewed-on: http://git-master/r/23760
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
| -rw-r--r-- | drivers/video/tegra/dc/dsi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c index e0e9ed9f1083..610c316bb358 100644 --- a/drivers/video/tegra/dc/dsi.c +++ b/drivers/video/tegra/dc/dsi.c @@ -771,11 +771,11 @@ static void tegra_dsi_set_dsi_clk(struct tegra_dc *dc, { u32 rm; - rm = clk % 100; + rm = clk % 1000; if (rm != 0) clk -= rm; - clk *= 2; /* Value for PLLD routine is required to be twice as */ + clk *= 2; /* Value for PLLD routine is required to be twice as */ /* the desired clock rate */ dc->mode.pclk = clk*1000; |