diff options
| author | Eric Anholt <eric@anholt.net> | 2012-01-19 10:50:06 -0800 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2013-02-06 04:33:45 +0000 |
| commit | d31349bd14461e299df2443dfec5bf7725154393 (patch) | |
| tree | 11d4690b3fdba9c2c6a3646ea3839d29e9bad481 | |
| parent | cba89978ad340768a908c03d0bb39c8003f33e84 (diff) | |
drm/i915: Correct the bit number for the MI_FLUSH_ENABLE.
commit fc74d8e01165b567922921d110b6d16320a61fa6 upstream.
Older specs claimed this was bit 11, but newer specs and the actual
simulator code say it was bit 12. Regardless, we don't use MI_FLUSH,
or try to enable it any more.
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Anyone trying to use this bit, please read all the relevant
discussions, it's epic.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 7a10f5fed1fb..56d931ae28ad 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -399,7 +399,7 @@ #define MI_MODE 0x0209c # define VS_TIMER_DISPATCH (1 << 6) -# define MI_FLUSH_ENABLE (1 << 11) +# define MI_FLUSH_ENABLE (1 << 12) #define GEN6_GT_MODE 0x20d0 #define GEN6_GT_MODE_HI (1 << 9) |