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authorBard Liao <bardliao@realtek.com>2015-04-28 11:27:39 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-05-13 05:14:27 -0700
commitbbc8c97c8e7fb76e07478e19e96a7fa6e7421bec (patch)
treed3a0a79356dec38493c99944ad1f7c255cf80f5b
parent04f1f52606395df0bf8c9ce6198869803d2f45e9 (diff)
ASoC: rt5677: fixed wrong DMIC ref clock
commit 60a8d62b8497c23eb3d48149af7e55dac2dd83a2 upstream. DMIC clock source is not from codec system clock directly. it is generated from the division of system clock. And it should be 256 * sample rate of AIF1. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--sound/soc/codecs/rt5677.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index b7f3644ab6c1..97b33e96439a 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -904,7 +904,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w,
{
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
- int idx = rl6231_calc_dmic_clk(rt5677->sysclk);
+ int idx = rl6231_calc_dmic_clk(rt5677->lrck[RT5677_AIF1] << 8);
if (idx < 0)
dev_err(codec->dev, "Failed to set DMIC clock\n");