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authorKrzysztof Kozlowski <krzk@kernel.org>2020-12-10 22:25:21 +0100
committerDenys Drozdov <denys.drozdov@toradex.com>2021-07-15 13:53:28 +0300
commit8d8f1d90dc837fd45b52f98259e589b799c17c83 (patch)
treee5b73a2094be51a211cd0c67d9329230a90ff5a6 /arch/arm/boot/dts/exynos4412-midas.dtsi
parent3bdfa60a5461c123b758d0eabb23179f80639a4a (diff)
ARM: dts: exynos: correct PMIC interrupt trigger level on Midas family
[ Upstream commit e52dcd6e70fab51f53292e53336ecb007bb60889 ] The Maxim PMIC datasheets describe the interrupt line as active low with a requirement of acknowledge from the CPU. Without specifying the interrupt type in Devicetree, kernel might apply some fixed configuration, not necessarily working for this hardware. Additionally, the interrupt line is shared so using level sensitive interrupt is here especially important to avoid races. Fixes: 15dfdfad2d4a ("ARM: dts: Add basic dts for Exynos4412-based Trats 2 board") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201210212534.216197-5-krzk@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos4412-midas.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos4412-midas.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi
index 79e6bd56f9ad..fedb21377c66 100644
--- a/arch/arm/boot/dts/exynos4412-midas.dtsi
+++ b/arch/arm/boot/dts/exynos4412-midas.dtsi
@@ -588,7 +588,7 @@
max77686: max77686_pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx0>;
- interrupts = <7 IRQ_TYPE_NONE>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&max77686_irq>;
pinctrl-names = "default";
reg = <0x09>;