diff options
| author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-12-10 22:29:00 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-03-04 10:26:12 +0100 |
| commit | f0f9e9152375409aaa1a61485b23d43b4b7bd5f2 (patch) | |
| tree | ab8efbaf9ddb390bfed3198a29aa4dce0de8f267 /arch/arm/boot/dts/exynos5422-odroid-core.dtsi | |
| parent | d32a94371fc1a387a6e9e019d68435d705d32348 (diff) | |
ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family
[ Upstream commit 3e7d9a583a24f7582c6bc29a0d4d624feedbc2f9 ]
The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU. The falling edge
interrupt will mostly work but it's not correct.
Fixes: aac4e0615341 ("ARM: dts: odroidxu3: Enable wake alarm of S2MPS11 RTC")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20201210212903.216728-6-krzk@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5422-odroid-core.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 829147e320e0..9e64a4ab9494 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -141,7 +141,7 @@ samsung,s2mps11-acokb-ground; interrupt-parent = <&gpx0>; - interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; pinctrl-0 = <&s2mps11_irq>; |