diff options
| author | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2021-02-11 15:15:38 +0200 |
|---|---|---|
| committer | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2021-02-18 13:46:39 +0000 |
| commit | a072d9df35b42fac3018e03e4c4bb9177ab94213 (patch) | |
| tree | 6731ccfc6940c3d4c664304f384593ab85616a0e /arch/arm/boot/dts/imx6dl-colibri-iris.dts | |
| parent | 7362764b2043dacc4700238eec0c8235915c5cb8 (diff) | |
ARM: dts: colibri-imx6: rearrange PCAP device nodes
Capacitive TS controllers are parts of peripheral, not boards.
Move all related stuff from board-level to the main module DT.
Prepare the DTs for use with atmel mxt overlays, adding required pinmux
groups.
The common scheme of pin groups for atmel mxt ts:
pinctrl_atmel_conn - uses 107/106 pins for INT/Reset signals;
pinctrl_atmel_adap - uses 28/30 pins for INT/Reset signals.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6dl-colibri-iris.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6dl-colibri-iris.dts | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris.dts b/arch/arm/boot/dts/imx6dl-colibri-iris.dts index ddfaceda64b7..19630add415a 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-iris.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-iris.dts @@ -44,18 +44,6 @@ &i2c3 { status = "okay"; - /* Atmel maxtouch controller */ - atmel_mxt_ts: atmel_mxt_ts@4a { - compatible = "atmel,maxtouch"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mxt_ts>; - reg = <0x4a>; - interrupt-parent = <&gpio2>; - interrupts = <24 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */ - reset-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */ - status = "okay"; - }; - /* M41T0M6 real time clock on carrier board */ rtc_i2c: rtc@68 { compatible = "st,m41t0"; @@ -147,13 +135,6 @@ pinctrl-0 = <&pinctrl_gpio_iris>; gpio { - pinctrl_mxt_ts: mxt-ts { - fsl,pins = < - MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /* SODIMM 107 */ - MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /* SODIMM 106 */ - >; - }; - pinctrl_gpio_iris: gpio-iris { fsl,pins = < MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0 /* SODIMM 98 */ |