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authorElla Feng <ella.feng@nxp.com>2019-09-05 19:52:25 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 16:07:28 +0800
commit4f40bf51217774382b5c55cbf83dcefe2a49701e (patch)
tree3e1b0e74ae313103307bc0ce2a4854fc3d450d8a /arch/arm/boot/dts/imx6q.dtsi
parent856d77391685d345821d9625e6660e5b45052255 (diff)
ARM: dts: imx6q/qp/dl/sx: enable GPU
Enable VIVANTE GPU with private driver for imx6/qp/dl/sx. Signed-off-by: Ella Feng <ella.feng@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index a587e354402e..bb4c6dbac374 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -220,6 +220,29 @@
#cooling-cells = <2>;
};
+ gpu: gpu@00130000 {
+ compatible = "fsl,imx6q-gpu";
+ reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
+ <0x02204000 0x4000>, <0x10000000 0x0>,
+ <0x0 0x8000000>;
+ reg-names = "iobase_3d", "iobase_2d",
+ "iobase_vg", "phys_baseaddr",
+ "contiguous_mem";
+ interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>,
+ <0 10 IRQ_TYPE_LEVEL_HIGH>,
+ <0 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_3d", "irq_2d", "irq_vg";
+ clocks = <&clks IMX6QDL_CLK_GPU2D_AXI>, <&clks IMX6QDL_CLK_OPENVG_AXI>,
+ <&clks IMX6QDL_CLK_GPU3D_AXI>, <&clks IMX6QDL_CLK_GPU2D_CORE>,
+ <&clks IMX6QDL_CLK_GPU3D_CORE>, <&clks IMX6QDL_CLK_GPU3D_SHADER>;
+ clock-names = "gpu2d_axi_clk", "openvg_axi_clk",
+ "gpu3d_axi_clk", "gpu2d_clk",
+ "gpu3d_clk", "gpu3d_shader_clk";
+ resets = <&src 0>, <&src 3>, <&src 3>;
+ reset-names = "gpu3d", "gpu2d", "gpuvg";
+ power-domains = <&pd_pu>;
+ };
+
ipu2: ipu@2800000 {
#address-cells = <1>;
#size-cells = <0>;