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authorAnson Huang <Anson.Huang@nxp.com>2019-04-17 13:40:08 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 16:04:10 +0800
commit956b8b6daa717003543591bd0043a66af7b1c867 (patch)
tree88b88037c47baebb4c8e20d3f3e2a04f6a966639 /arch/arm/boot/dts/imx6sx.dtsi
parent80f8151aa508e213563a274ae064b6929fd7cec9 (diff)
ARM: dts: imx6sx: add bus-freq support
Add busfreq node and adjust ocram space to support bus-freq driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi36
1 files changed, 32 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 531a52c1e987..b98cba9b2990 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -160,15 +160,43 @@
interrupt-parent = <&gpc>;
ranges;
- ocram_s: sram@8f8000 {
- compatible = "mmio-sram";
+ busfreq {
+ compatible = "fsl,imx_busfreq";
+ clocks = <&clks IMX6SX_CLK_PLL2_BUS>, <&clks IMX6SX_CLK_PLL2_PFD2>,
+ <&clks IMX6SX_CLK_PLL2_198M>, <&clks IMX6SX_CLK_ARM>,
+ <&clks IMX6SX_CLK_PLL3_USB_OTG>, <&clks IMX6SX_CLK_PERIPH>,
+ <&clks IMX6SX_CLK_PERIPH_PRE>, <&clks IMX6SX_CLK_PERIPH_CLK2>,
+ <&clks IMX6SX_CLK_PERIPH_CLK2_SEL>, <&clks IMX6SX_CLK_OSC>,
+ <&clks IMX6SX_CLK_PLL1_SYS>, <&clks IMX6SX_CLK_PERIPH2>,
+ <&clks IMX6SX_CLK_AHB>, <&clks IMX6SX_CLK_OCRAM_PODF>,
+ <&clks IMX6SX_CLK_PLL1_SW>, <&clks IMX6SX_CLK_PERIPH2_PRE>,
+ <&clks IMX6SX_CLK_PERIPH2_CLK2_SEL>, <&clks IMX6SX_CLK_PERIPH2_CLK2>,
+ <&clks IMX6SX_CLK_STEP>, <&clks IMX6SX_CLK_MMDC_PODF>,
+ <&clks IMX6SX_CLK_M4>;
+ clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm",
+ "pll3_usb_otg", "periph", "periph_pre", "periph_clk2",
+ "periph_clk2_sel", "osc", "pll1_sys", "periph2",
+ "ahb", "ocram", "pll1_sw", "periph2_pre",
+ "periph2_clk2_sel", "periph2_clk2", "step", "mmdc",
+ "m4";
+ fsl,max_ddr_freq = <400000000>;
+ };
+
+ ocrams: sram@008f8000 {
+ compatible = "fsl,lpm-sram";
reg = <0x008f8000 0x4000>;
clocks = <&clks IMX6SX_CLK_OCRAM_S>;
};
- ocram: sram@900000 {
+ ocrams_ddr: sram@00900000 {
+ compatible = "fsl,ddr-lpm-sram";
+ reg = <0x00900000 0x1000>;
+ clocks = <&clks IMX6SX_CLK_OCRAM>;
+ };
+
+ ocram: sram@00901000 {
compatible = "mmio-sram";
- reg = <0x00900000 0x20000>;
+ reg = <0x00901000 0x1F000>;
clocks = <&clks IMX6SX_CLK_OCRAM>;
};