diff options
| author | Frieder Schrempf <frieder.schrempf@kontron.de> | 2019-11-04 11:54:18 +0000 |
|---|---|---|
| committer | Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> | 2021-01-11 17:42:30 +0000 |
| commit | e0e74faf6af499893db511d587fd50782cc684ee (patch) | |
| tree | be781d0a5cc3a5a29525c0191c87a143cb6f976c /arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | |
| parent | ad24781aecc365b1e56f07b817beb77528244642 (diff) | |
ARM: dts: imx6ul-kontron-n6x1x-s: Remove an obsolete comment and fix indentation
The ECSPI1 is not used for a FRAM chip, so remove the comment.
While at it, also change some whitespaces to tabs to comply with the
indentation style of the rest of the file.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
(cherry picked from commit cc55c85d257e5d8435592643f4aeee683a8fa46f)
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi index 5725e5fc271b..f05e91841202 100644 --- a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi +++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi @@ -250,7 +250,6 @@ >; }; - /* FRAM */ pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1 @@ -275,8 +274,8 @@ pinctrl_enet2_mdio: enet2mdiogrp { fsl,pins = < - MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 - MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 >; }; @@ -289,10 +288,10 @@ pinctrl_gpio: gpiogrp { fsl,pins = < - MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */ - MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */ - MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */ - MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */ + MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */ + MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */ + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */ + MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */ >; }; |