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authorOleksandr Suvorov <oleksandr.suvorov@toradex.com>2021-01-13 17:27:50 +0200
committerOleksandr Suvorov <oleksandr.suvorov@toradex.com>2021-01-28 14:48:19 +0200
commitdc5bf3370f4710a1a922623e9b90b6f5053c08f4 (patch)
tree62d7591ab14f1bc35b12e975ec9f0cad5ad7421a /arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi
parente9aa1d22645090edd0d33c1d96109f7c7ea17927 (diff)
ARM: dts: colibri-imx6ull: remove SPI CS#2 setup
The SODIMM_65 pin, which should be used as a 2nd CS signal, is unavailable for customer on a Colibri Iris board. Remove the 2nd CS signal configuration for all Iris board versions. Related-to: ELB-3401 Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi b/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi
index 4aaac29a374b..dde92dd69998 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi
@@ -88,13 +88,6 @@
&ecspi1 {
status = "okay";
- fsl,spi-num-chipselects = <2>;
- /* Note, gpio4 11 is muxed by hoggrp-4 */
- cs-gpios = <
- &gpio3 26 GPIO_ACTIVE_HIGH
- &gpio4 28 GPIO_ACTIVE_HIGH
- >;
-
spidev0: spidev@0 {
compatible = "toradex,evalspi";
reg = <0>;