diff options
| author | Jacky Bai <ping.bai@nxp.com> | 2019-05-04 19:03:45 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:04:22 +0800 |
| commit | e36c0d4cac677456735a630f98a7b96fbcd661b1 (patch) | |
| tree | b1697c64ec38f27e858d5d9acdaf0caccc452f0f /arch/arm/boot/dts/imx6ull.dtsi | |
| parent | 1fb6fafe98071f995e8d23da79334926d4a047fb (diff) | |
arm: dts: imx: add busfreq node for imx6ull
Add the busfreq node for i.MX6ULL.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ull.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6ull.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index b7e67d121322..4de113d68ae0 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -51,6 +51,26 @@ / { soc { + busfreq { + compatible = "fsl,imx_busfreq"; + clocks = <&clks IMX6UL_CLK_PLL2_PFD2>, <&clks IMX6UL_CLK_PLL2_198M>, + <&clks IMX6UL_CLK_PLL2_BUS>, <&clks IMX6UL_CLK_ARM>, + <&clks IMX6UL_CLK_PLL3_USB_OTG>, <&clks IMX6UL_CLK_PERIPH>, + <&clks IMX6UL_CLK_PERIPH_PRE>, <&clks IMX6UL_CLK_PERIPH_CLK2>, + <&clks IMX6UL_CLK_PERIPH_CLK2_SEL>, <&clks IMX6UL_CLK_OSC>, + <&clks IMX6UL_CLK_AHB>, <&clks IMX6UL_CLK_AXI>, + <&clks IMX6UL_CLK_PERIPH2>, <&clks IMX6UL_CLK_PERIPH2_PRE>, + <&clks IMX6UL_CLK_PERIPH2_CLK2>, <&clks IMX6UL_CLK_PERIPH2_CLK2_SEL>, + <&clks IMX6UL_CLK_STEP>, <&clks IMX6UL_CLK_MMDC_P0_FAST>, <&clks IMX6UL_PLL1_BYPASS_SRC>, + <&clks IMX6UL_PLL1_BYPASS>, <&clks IMX6UL_CLK_PLL1_SYS>, <&clks IMX6UL_CLK_PLL1_SW>, + <&clks IMX6UL_CLK_PLL1>; + clock-names = "pll2_pfd2_396m", "pll2_198m", "pll2_bus", "arm", "pll3_usb_otg", + "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", + "ahb", "ocram", "periph2", "periph2_pre", "periph2_clk2", "periph2_clk2_sel", + "step", "mmdc", "pll1_bypass_src", "pll1_bypass", "pll1_sys", "pll1_sw", "pll1"; + fsl,max_ddr_freq = <400000000>; + }; + aips3: aips-bus@2200000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; |