diff options
| author | Philippe Schenker <philippe.schenker@toradex.com> | 2019-05-31 15:16:05 +0200 |
|---|---|---|
| committer | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2021-01-27 20:36:36 +0200 |
| commit | 988ec5fa38375526c8e23bbd61c1aa491de81bd2 (patch) | |
| tree | edddc3e35cf20e0cd106d074e6170274224fe404 /arch/arm/boot/dts/imx7-colibri.dtsi | |
| parent | eb6691b5fdd5275dc358a882be0c54106b1c0557 (diff) | |
ARM: dts: colibri: preparations for adding aster devicetree
This patch adds spigpios group to pinmux. This is needed by Aster
devicetrees that will be added later on.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
(cherry picked from commit dcba2ad8d49d65fe8319612064f42626a58d817a)
Conflicts:
arch/arm/boot/dts/imx7-colibri.dtsi
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7-colibri.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx7-colibri.dtsi | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 725254ac978d..be5112094a03 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -366,7 +366,7 @@ &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4 - &pinctrl_gpio7>; + &pinctrl_gpio5 &pinctrl_gpio6 &pinctrl_gpio7>; pinctrl_gpio1: gpio1-grp { fsl,pins = < @@ -417,7 +417,6 @@ pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */ fsl,pins = < - MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */ MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */ MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */ MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */ @@ -450,6 +449,20 @@ >; }; + pinctrl_gpio5: spigpios { + fsl,pins = < + /* CS1 */ + MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x74 /* SODIMM 65 */ + >; + }; + + pinctrl_gpio6: gpio6-grp { /* ATMEL MXT TOUCH */ + fsl,pins = < + MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 */ + MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x74 /* SODIMM 106 */ + >; + }; + pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */ fsl,pins = < MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ |