diff options
| author | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2021-03-29 00:02:08 +0300 |
|---|---|---|
| committer | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2021-04-05 19:00:38 +0300 |
| commit | e126d9d3bbb3b7d553847f17694652bd3c6209c1 (patch) | |
| tree | e04e218d7e066df40e98a158b3a4d24d463af154 /arch/arm/boot/dts/imx7-colibri.dtsi | |
| parent | fc386214b3bc1bfaacf684edfe939bd6e1deb316 (diff) | |
ARM: dts: colibri-imx7: prepare for LVDS transceiver overlay
Add the pinmux group for LVDS transceiver related signals to use it
in an overlay.
Fix pinmux default values for these pins.
Enable the LVDS transceiver for NAND modules on a board
Iris v2.0A by default.
Related-to: ELB-3898
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7-colibri.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx7-colibri.dtsi | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index c3475cbdd37b..3856c3a50ccf 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -13,6 +13,7 @@ brightness-levels = <0 45 63 88 119 158 203 255>; default-brightness-level = <4>; enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + power-supply = <®_module_3v3>; pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>; status = "okay"; }; @@ -693,7 +694,7 @@ &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4 - &pinctrl_gpio5 &pinctrl_gpio7>; + &pinctrl_gpio5 &pinctrl_lvds_transceiver>; pinctrl_atmel_adapter: atmeladaptergrp { /* ATMEL MXT TOUCH ADAPTER */ fsl,pins = < @@ -715,8 +716,6 @@ MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ - MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ - MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */ @@ -956,6 +955,14 @@ >; }; + pinctrl_lvds_transceiver: lvds-tx { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */ + MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ + MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ + MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ + >; + }; pinctrl_pwm1: pwm1-grp { fsl,pins = < MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 |