diff options
| author | Han Xu <han.xu@nxp.com> | 2019-08-14 19:29:11 -0500 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:06:20 +0800 |
| commit | 0ca9c7cd87deb03d68d6f78aeb3d0c32b17a09ad (patch) | |
| tree | caa6df9681fe45df24336e4a5fd85370f6a1850e /arch/arm/boot/dts/imx7d-sdb.dts | |
| parent | 9a829f97bce014923de24cce705d0491261c39f4 (diff) | |
arm: dts: add gpmi-nand support for imx7d sabresd
add gpmi-nand support for imx7d sabresd
Signed-off-by: Han Xu <han.xu@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7d-sdb.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx7d-sdb.dts | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts index 1536d2717c5f..57deeefcbe58 100644 --- a/arch/arm/boot/dts/imx7d-sdb.dts +++ b/arch/arm/boot/dts/imx7d-sdb.dts @@ -264,6 +264,13 @@ status = "okay"; }; +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand_1>; + status = "disabled"; + nand-on-flash-bbt; +}; + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; @@ -608,6 +615,27 @@ >; }; + pinctrl_gpmi_nand_1: gpmi-nand-1 { + fsl,pins = < + MX7D_PAD_SD3_CLK__NAND_CLE 0x71 + MX7D_PAD_SD3_CMD__NAND_ALE 0x71 + MX7D_PAD_SAI1_MCLK__NAND_WP_B 0x71 + MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 + MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B 0x71 + MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 + MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 + MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 + MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71 + MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71 + MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71 + MX7D_PAD_SD3_DATA3__NAND_DATA03 0x71 + MX7D_PAD_SD3_DATA4__NAND_DATA04 0x71 + MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71 + MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71 + MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71 + >; + }; + pinctrl_hog: hoggrp { fsl,pins = < MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */ |