diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2019-07-29 09:33:13 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:05:41 +0800 |
| commit | e3827422374fd4f27538703a968de16e4c5dffbe (patch) | |
| tree | f2fdfdf8c4fbfdde9262aa8e21c430a16d16a6e3 /arch/arm/boot/dts/imx7ulp.dtsi | |
| parent | 6698da7cde962ab3fb1450b80ad27442c96784e5 (diff) | |
arm: dts: imx7ulp: specify the mu compatible name
One version 1.0 MU module is contained in i.MX7ULP.
And it has the different register layout.
Use one specific compatible for i.MX7ULP MU.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7ulp.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx7ulp.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index d081a63ab306..f12d310570d2 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -130,7 +130,7 @@ }; mu: mu@40220000 { - compatible = "fsl,imx7ulp-mu", "fsl,imx6sx-mu"; + compatible = "fsl,imx7ulp-mu"; reg = <0x40220000 0x1000>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; #mbox-cells = <2>; |