diff options
| author | Vladimir Zapolskiy <vz@mleia.com> | 2019-04-19 23:54:46 +0300 |
|---|---|---|
| committer | Vladimir Zapolskiy <vz@mleia.com> | 2019-04-19 23:57:04 +0300 |
| commit | cea862386791e281c4e9ab07dd118321f6655435 (patch) | |
| tree | 63a94e5d0b2cf170990c97b95621c440ae1c3d03 /arch/arm/boot/dts/lpc3250-phy3250.dts | |
| parent | 4c546175dbe1b9bde68f547666a2c1f75d65b817 (diff) | |
ARM: dts: lpc32xx: add address and size cell values to SPI controller nodes
All 4 SPI controllers on NXP LPC32xx SoC support SPI slaves discerning them
by one cell address value, set it as default to avoid duplication in board
device tree files.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Diffstat (limited to 'arch/arm/boot/dts/lpc3250-phy3250.dts')
| -rw-r--r-- | arch/arm/boot/dts/lpc3250-phy3250.dts | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/lpc3250-phy3250.dts b/arch/arm/boot/dts/lpc3250-phy3250.dts index b99726d278f6..1b15f798794b 100644 --- a/arch/arm/boot/dts/lpc3250-phy3250.dts +++ b/arch/arm/boot/dts/lpc3250-phy3250.dts @@ -202,8 +202,6 @@ }; &ssp0 { - #address-cells = <1>; - #size-cells = <0>; num-cs = <1>; cs-gpios = <&gpio 3 5 0>; status = "okay"; |