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authorRoland Stigge <stigge@antcom.de>2012-06-14 16:16:17 +0200
committerRoland Stigge <stigge@antcom.de>2012-06-14 16:16:17 +0200
commit6d1c3e93e37f35dac67fd88822e4a3100b1bd2c3 (patch)
treea53c6e405f8ee762ef57f088b7b5f8781e88350f /arch/arm/boot/dts/lpc32xx.dtsi
parentd807af4793a464f7331f92461a619e5e7ddf9089 (diff)
ARM: LPC32xx: Adjust dtsi file for MLC controller configuration
This patch takes into account that the MTD NAND MLC controller needs more registers, located actually before the previously allocated memory range, already starting at 200a8000 instead of 200b0000. Further, the interrupt for the controller is configured. Signed-off-by: Roland Stigge <stigge@antcom.de> Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/lpc32xx.dtsi')
-rw-r--r--arch/arm/boot/dts/lpc32xx.dtsi5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index 3f5dad801a98..254d586d4b1a 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -38,9 +38,10 @@
status = "disable";
};
- mlc: flash@200B0000 {
+ mlc: flash@200a8000 {
compatible = "nxp,lpc3220-mlc";
- reg = <0x200B0000 0x1000>;
+ reg = <0x200a8000 0x11000>;
+ interrupts = <11 0>;
status = "disable";
};