diff options
| author | SZ Lin <sz.lin@moxa.com> | 2017-09-12 14:49:25 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2017-12-26 16:15:44 +0800 |
| commit | 85f8ee78ab72451ab8ba655dca566bdbbca595c6 (patch) | |
| tree | 940927fbcb96c1d86e61183fd5b2d9a9903fbf5a /arch/arm/boot/dts/ls1021a.dtsi | |
| parent | 50c4c4e268a2d7a3e58ebb698ac74da0de40ae36 (diff) | |
ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC
Add QSPI node support, and this function is disabled by default
This setting could be overwritten in board-level definitions
Signed-off-by: SZ Lin <sz.lin@moxa.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/ls1021a.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/ls1021a.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 9319e1f0f1d8..88f717b09962 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -154,6 +154,20 @@ big-endian; }; + qspi: quadspi@1550000 { + compatible = "fsl,ls1021a-qspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x1550000 0x0 0x10000>, + <0x0 0x40000000 0x0 0x40000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "qspi_en", "qspi"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>; + big-endian; + status = "disabled"; + }; + esdhc: esdhc@1560000 { compatible = "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; |