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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2017-06-04 20:33:41 +0200
committerKevin Hilman <khilman@baylibre.com>2017-06-09 11:21:21 -0700
commit2c323c43a3d619d67bffa57dc7480cfae4c53300 (patch)
tree581c5845749cd7e9864dbc843e8980410b1b436c /arch/arm/boot/dts/meson8.dtsi
parentbbe5b23dfdd346e782f8c56ab01bb3f5eaddd438 (diff)
ARM: dts: meson8: add and use the real clock controller
This removes the dummy clk81 gate and replaces it with the actual clock controller's CLKID_CLK81. This will also allow us to pass the real clock IDs to all devices where the clock is controlled by clkc in the future. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/meson8.dtsi')
-rw-r--r--arch/arm/boot/dts/meson8.dtsi32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 6993077331c7..9b0b3ddbb17e 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -43,6 +43,7 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+#include <dt-bindings/clock/meson8b-clkc.h>
#include <dt-bindings/gpio/meson8-gpio.h>
/include/ "meson.dtsi"
@@ -82,13 +83,6 @@
reg = <0x203>;
};
};
-
- clk81: clk@0 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <141666666>;
- };
-
}; /* end of / */
&aobus {
@@ -126,6 +120,12 @@
};
&cbus {
+ clkc: clock-controller@4000 {
+ #clock-cells = <1>;
+ compatible = "amlogic,meson8-clkc";
+ reg = <0x8000 0x4>, <0x4000 0x460>;
+ };
+
pinctrl_cbus: pinctrl@9880 {
compatible = "amlogic,meson8-cbus-pinctrl";
reg = <0x9880 0x10>;
@@ -172,20 +172,20 @@
};
&ethmac {
- clocks = <&clk81>;
+ clocks = <&clkc CLKID_CLK81>;
clock-names = "stmmaceth";
};
&i2c_AO {
- clocks = <&clk81>;
+ clocks = <&clkc CLKID_CLK81>;
};
&i2c_A {
- clocks = <&clk81>;
+ clocks = <&clkc CLKID_CLK81>;
};
&i2c_B {
- clocks = <&clk81>;
+ clocks = <&clkc CLKID_CLK81>;
};
&L2 {
@@ -195,21 +195,21 @@
};
&spifc {
- clocks = <&clk81>;
+ clocks = <&clkc CLKID_CLK81>;
};
&uart_AO {
- clocks = <&clk81>;
+ clocks = <&clkc CLKID_CLK81>;
};
&uart_A {
- clocks = <&clk81>;
+ clocks = <&clkc CLKID_CLK81>;
};
&uart_B {
- clocks = <&clk81>;
+ clocks = <&clkc CLKID_CLK81>;
};
&uart_C {
- clocks = <&clk81>;
+ clocks = <&clkc CLKID_CLK81>;
};