summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/r8a77470.dtsi
diff options
context:
space:
mode:
authorFabrizio Castro <fabrizio.castro@bp.renesas.com>2019-03-19 12:21:38 +0000
committerSimon Horman <horms+renesas@verge.net.au>2019-03-25 11:56:40 +0100
commit4ec778fb0f26692419609d2f39b6f8c829ed1fb5 (patch)
tree3b1f59af9abc30469337a70517598295232ef96b /arch/arm/boot/dts/r8a77470.dtsi
parent53239664e5ae353f60f37a566dbd32415a906ee8 (diff)
ARM: dts: r8a77470: Add DU support
This commit adds DU support to the RZ/G1C (a.k.a. r8a77470) specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a77470.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a77470.dtsi32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index f4e232bf9d03..493cf2b3f795 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -643,6 +643,38 @@
resets = <&cpg 408>;
};
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a77470";
+ reg = <0 0xfeb00000 0 0x40000>;
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>;
+ clock-names = "du.0", "du.1";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb0: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_rgb1: endpoint {
+ };
+ };
+ port@2 {
+ reg = <2>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ };
+ };
+
prr: chipid@ff000044 {
compatible = "renesas,prr";
reg = <0 0xff000044 0 4>;