diff options
| author | Otavio Salvador <otavio@ossystems.com.br> | 2018-11-26 15:35:04 -0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2018-11-27 01:07:32 +0100 |
| commit | efc2e0bd9594060915696a418564aefd0270b1d6 (patch) | |
| tree | ccffea929088a33a8ccc03a0375f0acf834a21ba /arch/arm/boot/dts/rv1108.dtsi | |
| parent | c955b7aec510145129ca7aaea6ecbf6d748f5ebf (diff) | |
ARM: dts: rockchip: Assign the proper GPIO clocks for rv1108
It is not correct to assign the 24MHz clock oscillator to the GPIO
ports.
Fix it by assigning the proper GPIO clocks instead.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rv1108.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rv1108.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 611f2fe8e56c..300de8e1475b 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -565,7 +565,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x20030000 0x100>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&xin24m>; + clocks = <&cru PCLK_GPIO0_PMU>; gpio-controller; #gpio-cells = <2>; @@ -578,7 +578,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x10310000 0x100>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&xin24m>; + clocks = <&cru PCLK_GPIO1>; gpio-controller; #gpio-cells = <2>; @@ -591,7 +591,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x10320000 0x100>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&xin24m>; + clocks = <&cru PCLK_GPIO2>; gpio-controller; #gpio-cells = <2>; @@ -604,7 +604,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x10330000 0x100>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&xin24m>; + clocks = <&cru PCLK_GPIO3>; gpio-controller; #gpio-cells = <2>; |