diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2021-11-01 19:36:30 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-12-22 09:29:35 +0100 |
| commit | f83ed203c822ee5c9e30a31c387714503d6603b3 (patch) | |
| tree | 404040d3b407eae7b8e5cf1214145aa65a3a0970 /arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts | |
| parent | 46b9e29db2012a4d2a40a26101862e002ccf387b (diff) | |
ARM: socfpga: dts: fix qspi node compatible
[ Upstream commit cb25b11943cbcc5a34531129952870420f8be858 ]
The QSPI flash node needs to have the required "jedec,spi-nor" in the
compatible string.
Fixes: 1df99da8953 ("ARM: dts: socfpga: Enable QSPI in Arria10 devkit")
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts index a060718758b6..25874e1b9c82 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts @@ -224,7 +224,7 @@ n25q128@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "n25q128"; + compatible = "micron,n25q128", "jedec,spi-nor"; reg = <0>; /* chip select */ spi-max-frequency = <100000000>; m25p,fast-read; @@ -241,7 +241,7 @@ n25q00@1 { #address-cells = <1>; #size-cells = <1>; - compatible = "n25q00"; + compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <1>; /* chip select */ spi-max-frequency = <100000000>; m25p,fast-read; |