diff options
| author | Patrice Chotard <patrice.chotard@st.com> | 2018-01-18 17:34:59 +0100 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@st.com> | 2018-02-12 15:24:35 +0100 |
| commit | b2d81762ce896e488e79abe292b8700b8ba1a303 (patch) | |
| tree | 8cbf82d0a180efb036126c9c1933fc678a7e3fc5 /arch/arm/boot/dts/stihxxx-b2120.dtsi | |
| parent | 0b09a91a0d053c78429a0f0ffd169d7afcba70a7 (diff) | |
ARM: dts: STi: Add fake reg property for miphy28lp_phy
Add fake reg property to miphy28lp_phy.
This allows to fix the following warning when compiling
dtb with W=1 option:
arch/arm/boot/dts/stih407-b2120.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stihxxx-b2120.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stihxxx-b2120.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi index 1fd3a2b5b938..66c1c6a5eb76 100644 --- a/arch/arm/boot/dts/stihxxx-b2120.dtsi +++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi @@ -80,7 +80,7 @@ st,i2c-min-sda-pulse-width-us = <5>; }; - miphy28lp_phy: miphy28lp { + miphy28lp_phy: miphy28lp@0 { phy_port0: port@9b22000 { st,osc-rdy; |