diff options
| author | Gabriel Fernandez <gabriel.fernandez@st.com> | 2016-10-14 11:18:00 +0200 |
|---|---|---|
| committer | Alexandre TORGUE <alexandre.torgue@st.com> | 2016-11-04 15:08:08 +0100 |
| commit | f6dbbff4f0af1a5c0d6eaf414572b5eff7a73a8b (patch) | |
| tree | db082168c3081f5e85e443e1bcd096e39abd3f6d /arch/arm/boot/dts/stm32f429.dtsi | |
| parent | ed75bf3380bb5810d67a96cc8b61ec9ea95dea70 (diff) | |
ARM: dts: stm32f429: add LSI and LSE clocks
This patch adds lsi / lse oscillators. These clocks can be use by
RTC clocks.
The clock drivers needs to disable the power domain write protection using
syscon / regmap to enable these clocks.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32f429.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32f429.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index b02a31edd0b2..e4dae0eda3cd 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -56,6 +56,18 @@ compatible = "fixed-clock"; clock-frequency = <0>; }; + + clk-lse { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + + clk-lsi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32000>; + }; }; soc { @@ -189,6 +201,11 @@ interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>; }; + pwrcfg: power-config@40007000 { + compatible = "syscon"; + reg = <0x40007000 0x400>; + }; + pin-controller { #address-cells = <1>; #size-cells = <1>; @@ -346,6 +363,7 @@ compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; reg = <0x40023800 0x400>; clocks = <&clk_hse>; + st,syscfg = <&pwrcfg>; }; dma1: dma-controller@40026000 { |