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authorAmelie Delaunay <amelie.delaunay@st.com>2018-02-19 09:46:00 +0100
committerAlexandre Torgue <alexandre.torgue@st.com>2018-02-27 15:37:46 +0100
commit98bbfc5285fca72151d8758d7124bee4b24fa606 (patch)
treeed960d8fb42f665e5002397621499407146e9ccb /arch/arm/boot/dts/stm32h743-pinctrl.dtsi
parente3fa5054744f1aed8a0cbc2f45c5b0071476355c (diff)
ARM: dts: stm32: enable USB OTG HS on stm32h743i-eval
This patch enables USB HS on stm32h743i-eval in OTG (DRD) mode. The USB connector used will determine the role of USB OTG controller. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32h743-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/stm32h743-pinctrl.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
index ee5202d88b2f..0f15dfb98381 100644
--- a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
@@ -188,6 +188,26 @@
bias-disable;
};
};
+
+ usbotg_hs_pins_a: usbotg-hs@0 {
+ pins {
+ pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */
+ <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */
+ <STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */
+ <STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */
+ <STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */
+ <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */
+ <STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */
+ <STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */
+ <STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */
+ <STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */
+ <STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */
+ <STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ };
};
};
};