summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/tegra124-apalis.dtsi
diff options
context:
space:
mode:
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2016-11-22 01:14:05 +0100
committerThierry Reding <treding@nvidia.com>2017-01-25 07:46:54 +0100
commit5142bd659c1bd6da102a54d8cd7aae4af38c38b2 (patch)
tree8c7a234fe777a5860820c249c4364a2b99a1c4a6 /arch/arm/boot/dts/tegra124-apalis.dtsi
parenta7f9d4febc8159fd977cbf08113e67cadc70214c (diff)
ARM: tegra: apalis-tk1: Adjust pin muxing for v1.1 HW
Configure Apalis MMC1 D6 GPIO on SDMMC3_CLK_LB_IN as reserved function without any pull-up/down. Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW. Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not tristated and input driver enabled as well as it features some magic properties even though the external loopback is disabled and the internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is now a not-connect on V1.1 HW in order to avoid any interference. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124-apalis.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra124-apalis.dtsi53
1 files changed, 23 insertions, 30 deletions
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 4ef9c2585c5d..0651d6889a8c 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -416,18 +416,10 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
- /*
- * Don't use MMC1_D6 aka SDMMC3_CLK_LB_IN for now as it
- * features some magic properties even though the
- * external loopback is disabled and the internal
- * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0
- * register's SDMMC_SPARE1 bits being set to 0xfffd
- * according to the TRM!
- */
sdmmc3_clk_lb_in_pee5 { /* D6 GPIO */
nvidia,pins = "sdmmc3_clk_lb_in_pee5";
- nvidia,function = "sdmmc3";
- nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
@@ -522,20 +514,12 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
- /*
- * Don't use SD1_CD# aka SDMMC3_CLK_LB_OUT for now as it
- * features some magic properties even though the
- * external loopback is disabled and the internal
- * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0
- * register's SDMMC_SPARE1 bits being set to 0xfffd
- * according to the TRM!
- */
- sdmmc3_clk_lb_out_pee4 { /* CD# GPIO */
- nvidia,pins = "sdmmc3_clk_lb_out_pee4";
- nvidia,function = "rsvd2";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ sdmmc3_cd_n_pv2 { /* CD# GPIO */
+ nvidia,pins = "sdmmc3_cd_n_pv2";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
- nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
/* Apalis SPDIF */
@@ -1514,13 +1498,6 @@
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
- sdmmc3_cd_n_pv2 { /* NC */
- nvidia,pins = "sdmmc3_cd_n_pv2";
- nvidia,function = "rsvd3";
- nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
- nvidia,enable-input = <TEGRA_PIN_DISABLE>;
- };
gpio_x1_aud_px1 { /* NC */
nvidia,pins = "gpio_x1_aud_px1";
nvidia,function = "rsvd2";
@@ -1570,6 +1547,22 @@
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
+ /*
+ * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output
+ * driver enabled aka not tristated and input driver
+ * enabled as well as it features some magic properties
+ * even though the external loopback is disabled and the
+ * internal loopback used as per
+ * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
+ * bits being set to 0xfffd according to the TRM!
+ */
+ sdmmc3_clk_lb_out_pee4 { /* NC */
+ nvidia,pins = "sdmmc3_clk_lb_out_pee4";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
};
};