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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-20 14:16:20 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-21 01:23:58 +0900
commitad81e78a89b9c5ac61139a968ccb8612e73d57c3 (patch)
tree0f984fcaf6fbfa5f02d65641811e46ce6510861b /arch/arm/boot/dts/uniphier-pro4.dtsi
parent2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e (diff)
ARM: dts: uniphier: add STDMAC clock to EHCI nodes
Without the STDMAC clock enabled, the USB 2.0 hosts do not work. This clock must be explicitly listed in the "clocks" property because it is independent of the other clocks. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-pro4.dtsi')
-rw-r--r--arch/arm/boot/dts/uniphier-pro4.dtsi6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index b3dbbd9b6e39..2a9bd7f9f5db 100644
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -241,7 +241,8 @@
interrupts = <0 80 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>;
- clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
+ clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
+ <&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>;
};
@@ -253,7 +254,8 @@
interrupts = <0 81 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3>;
- clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
+ clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
+ <&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>;
};