diff options
| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2021-04-23 02:31:48 +0900 |
|---|---|---|
| committer | Denys Drozdov <denys.drozdov@toradex.com> | 2021-07-15 13:53:39 +0300 |
| commit | 4a79e332603f2c59d4d51144c9aa5ee017985e21 (patch) | |
| tree | ed2ac70a39e71d393221f5e57b673f538cf00d9d /arch/arm/boot/dts/uniphier-pxs2.dtsi | |
| parent | 719e8a7614612b20676969b5ce440033d66efebf (diff) | |
ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
[ Upstream commit 9ba585cc5b56ea14a453ba6be9bdb984ed33471a ]
UniPhier PXs2 boards have RTL8211E ethernet phy, and the phy have the RX/TX
delays of RGMII interface using pull-ups on the RXDLY and TXDLY pins.
After the commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), the delays are working correctly, however, "rgmii" means
no delay and the phy doesn't work. So need to set the phy-mode to
"rgmii-id" to show that RX/TX delays are enabled.
Fixes: e3cc931921d2 ("ARM: dts: uniphier: add AVE ethernet node")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-pxs2.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 4eddbb8d7fca..60a588ce45e1 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -571,7 +571,7 @@ clocks = <&sys_clk 6>; reset-names = "ether"; resets = <&sys_rst 6>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; local-mac-address = [00 00 00 00 00 00]; socionext,syscon-phy-mode = <&soc_glue 0>; |