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authorDenys Drozdov <denys.drozdov@toradex.com>2022-01-14 19:58:03 +0200
committerDenys Drozdov <denys.drozdov@toradex.com>2022-01-25 21:14:16 +0200
commit15540f62965934564640335afbc9e6004cf06b30 (patch)
tree88a79a396289f5b27d76544e1ee475a8e9993b05 /arch/arm/boot/dts
parent6a764c4efafeb06505bc25c0cd96c23c64147103 (diff)
arm: dts: colibri-imx7: clean-up sd card dts
Keep +3.3V pull-ups interface by default in SOM DTSI imx7-colibri.dtsi SD card interface setting per board device tree: imx7-colibri-aster.dtsi +3.3V pull-ups imx7-colibri-eval-3.dtsi +3.3V pull-ups imx7-colibri-iris.dtsi +3.3V pull-ups imx7-colibri-iris-v2.dtsi 1.8V signaling, no pull-ups, UHS capable Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/imx7-colibri-aster.dtsi25
-rw-r--r--arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi24
-rw-r--r--arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi50
-rw-r--r--arch/arm/boot/dts/imx7-colibri-iris.dtsi28
-rw-r--r--arch/arm/boot/dts/imx7-colibri.dtsi28
5 files changed, 29 insertions, 126 deletions
diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index 0aa282ca4a29..0469ca23d8d3 100644
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -135,31 +135,8 @@
status = "okay";
};
-/* The define SD_1_8 allows to use the SD interface at a higher speed mode
- * if the card supports it. For this the signaling voltage is switched from
- * 3.3V to 1.8V under the usdhc1's drivers control.
- * All pins supplied with NVCC_SD1 must be able to cope with this
- * and must (MUST!!!) not be driven with a voltage higher than 1.8V or
- * the interface will not work.
- */
-/* #define SD_1_8 */
&usdhc1 {
-#ifdef SD_1_8
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>;
- vmmc-supply = <&reg_3p3v>;
- vqmmc-supply = <&reg_LDO2>;
-#else
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- no-1-8-v;
-#endif
- cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
- disable-wp;
- enable-sdio-wakeup;
- keep-power-in-suspend;
+ vmmc-supply = <&reg_3v3>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 279681042628..629eeaad58ac 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -156,31 +156,7 @@
status = "okay";
};
-/* The define SD_1_8 allows to use the SD interface at a higher speed mode
- * if the card supports it. For this the signaling voltage is switched from
- * 3.3V to 1.8V under the usdhc1's drivers control.
- * All pins supplied with NVCC_SD1 must be able to cope with this
- * and must (MUST!!!) not be driven with a voltage higher than 1.8V or
- * the interface will not work.
- */
-/* #define SD_1_8 */
&usdhc1 {
-#ifdef SD_1_8
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>;
- vqmmc-supply = <&reg_LDO2>;
-#else
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- no-1-8-v;
-#endif
- cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
- disable-wp;
- enable-sdio-wakeup;
- keep-power-in-suspend;
- wakeup-source;
vmmc-supply = <&reg_3v3>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi
index f2ebe9f53f91..190549461610 100644
--- a/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi
@@ -144,56 +144,10 @@
status = "okay";
};
-/* The define SD_1_8 allows to use the SD interface at a higher speed mode
- * if the card supports it. For this the signaling voltage is switched from
- * 3.3V to 1.8V under the usdhc1's drivers control.
- * All pins supplied with NVCC_SD1 must be able to cope with this
- * and must (MUST!!!) not be driven with a voltage higher than 1.8V or
- * the interface will not work.
- */
-#define SD_1_8
&usdhc1 {
-#ifdef SD_1_8
- pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>;
- pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_cd_usdhc1_sleep>;
- vqmmc-supply = <&reg_LDO2>;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
-#else
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_sleep &pinctrl_cd_usdhc1_sleep>;
- no-1-8-v;
-#endif
- cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
- disable-wp;
- enable-sdio-wakeup;
cap-power-off-card;
- wakeup-source;
+ /delete-property/ keep-power-in-suspend;
+ /delete-property/ no-1-8-v;
vmmc-supply = <&reg_3v3_vmmc>;
status = "okay";
};
-
-&iomuxc {
- pinctrl_usdhc1_sleep: usdhc1-slp-grp {
- fsl,pins = <
- MX7D_PAD_SD1_CMD__SD1_CMD 0x10
- MX7D_PAD_SD1_CLK__SD1_CLK 0x10
- MX7D_PAD_SD1_DATA0__SD1_DATA0 0x10
- MX7D_PAD_SD1_DATA1__SD1_DATA1 0x10
- MX7D_PAD_SD1_DATA2__SD1_DATA2 0x10
- MX7D_PAD_SD1_DATA3__SD1_DATA3 0x10
- >;
- };
-
- pinctrl_cd_usdhc1_sleep: usdhc1-cd-slp-grp {
- fsl,pins = <
- MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 /* CD */
- >;
- };
-};
diff --git a/arch/arm/boot/dts/imx7-colibri-iris.dtsi b/arch/arm/boot/dts/imx7-colibri-iris.dtsi
index 08279c00b3dc..dae3614b6829 100644
--- a/arch/arm/boot/dts/imx7-colibri-iris.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-iris.dtsi
@@ -143,35 +143,7 @@
};
};
-/* The define SD_1_8 allows to use the SD interface at a higher speed mode
- * if the card supports it. For this the signaling voltage is switched from
- * 3.3V to 1.8V under the usdhc1's drivers control.
- * All pins supplied with NVCC_SD1 must be able to cope with this
- * and must (MUST!!!) not be driven with a voltage higher than 1.8V or
- * the interface will not work.
- */
-#define SD_1_8
&usdhc1 {
-#ifdef SD_1_8
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>;
- vqmmc-supply = <&reg_LDO2>;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
-#else
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- no-1-8-v;
-#endif
- cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
- disable-wp;
- enable-sdio-wakeup;
- keep-power-in-suspend;
- wakeup-source;
vmmc-supply = <&reg_3v3>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 348d98e110fc..9831755d8b8b 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -685,11 +685,18 @@
};
&usdhc1 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>;
+ pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_cd_usdhc1_sleep>;
+ bus-width = <4>;
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
- disable-wp;
+ keep-power-in-suspend;
+ no-1-8-v;
vqmmc-supply = <&reg_LDO2>;
+ wakeup-source;
+ status = "disabled";
};
&usdhc3 {
@@ -1142,6 +1149,23 @@
MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f
>;
};
+
+ pinctrl_usdhc1_sleep: usdhc1-slp-grp {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x10
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x10
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x10
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x10
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x10
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x10
+ >;
+ };
+
+ pinctrl_cd_usdhc1_sleep: usdhc1-cd-slp-grp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 /* CD */
+ >;
+ };
};
&iomuxc_lpsr {