diff options
| author | Ooi, Joyce <joyce.ooi@intel.com> | 2018-04-24 11:01:58 +0800 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2018-04-24 10:12:49 -0500 |
| commit | e8c622e2b51b9ad4a8cd3f153a2ca4f1b61cf165 (patch) | |
| tree | 66a5347c49058e2cebf86e97d7c38c6dd92cc3d0 /arch/arm64/boot/dts/altera | |
| parent | f64dd550939698b0e24faa2c9083189a5467eb14 (diff) | |
arm64: dts: stratix10: Change pad skew values for EMAC0 PHY driver
The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA
drive strength has caused CE test to fail. This requires changes on the
pad skew for EMAC0 PHY driver. Based on several measurements done, Tx
clock does not require the extra 0.96ns delay.
Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/altera')
| -rw-r--r-- | arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts index d03df18ca967..f9b1ef12db48 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts @@ -94,7 +94,7 @@ rxd2-skew-ps = <420>; /* 0ps */ rxd3-skew-ps = <420>; /* 0ps */ txen-skew-ps = <0>; /* -420ps */ - txc-skew-ps = <1860>; /* 960ps */ + txc-skew-ps = <900>; /* 0ps */ rxdv-skew-ps = <420>; /* 0ps */ rxc-skew-ps = <1680>; /* 780ps */ }; |