diff options
| author | Robert Chiras <robert.chiras@nxp.com> | 2018-11-26 14:38:03 +0200 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:36:05 +0800 |
| commit | 71a1cbb29a67b359b8bb0bb7b8dd8f6b0c895a99 (patch) | |
| tree | 6881e7876505528b0e8cdda016ec8aacdabc01f7 /arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi | |
| parent | f7743a67d1493f423a336af5e8a68970a8aacb2f (diff) | |
MLK-17537-12: arch: arm64: fsl-imx8dx: Add phy_ref clock for DSI
Currently, the phy_ref clock is also used by dsi_bridge nodes (nwl-dsi
driver) in order to set the phy_ref rate needed by a specific mode.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi index 2a8da9b34d11..b647675d8141 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi @@ -1828,7 +1828,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&irqsteer_mipi_lvds0>; clocks = - <&clk IMX8QXP_CLK_DUMMY>, + <&clk IMX8QXP_MIPI0_BYPASS_CLK>, <&clk IMX8QXP_MIPI0_DSI_TX_ESC_CLK>, <&clk IMX8QXP_MIPI0_DSI_RX_ESC_CLK>; clock-names = "phy_ref", "tx_esc", "rx_esc"; @@ -2004,7 +2004,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&irqsteer_mipi_lvds1>; clocks = - <&clk IMX8QXP_CLK_DUMMY>, + <&clk IMX8QXP_MIPI1_BYPASS_CLK>, <&clk IMX8QXP_MIPI1_DSI_TX_ESC_CLK>, <&clk IMX8QXP_MIPI1_DSI_RX_ESC_CLK>; clock-names = "phy_ref", "tx_esc", "rx_esc"; |