diff options
| author | Peter Chen <peter.chen@nxp.com> | 2018-09-28 14:43:20 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:38 +0800 |
| commit | 810541291f1ad6482e1144348392a0feb36102bc (patch) | |
| tree | c12c0769f2802944e476c06860ea54e5bf7bccd3 /arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi | |
| parent | 60b0684439f3a7670d65344cb38fb6ec31273194 (diff) | |
MLK-19850-2 ARM64: dts: fsl-imx8dx: enlarge USB PHY register region
There is a DCD module at USBPHY, the offset is from 0x800.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi index 3f2ba6670d01..16428d97b319 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi @@ -2366,7 +2366,7 @@ usbphy1: usbphy@0x5b100000 { compatible = "fsl,imx8qm-usbphy", "fsl,imx7ulp-usbphy", "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; - reg = <0x0 0x5b100000 0x0 0x200>; + reg = <0x0 0x5b100000 0x0 0x1000>; clocks = <&clk IMX8QXP_USB2_PHY_IPG_CLK>; power-domains = <&pd_conn_usbotg0_phy>; }; |